W83977AF Information Storage Devices, Inc, W83977AF Datasheet - Page 69

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W83977AF

Manufacturer Part Number
W83977AF
Description
W83877TF Plus Kbc, Cir, RTC
Manufacturer
Information Storage Devices, Inc
Datasheet
Advanced IR:
Bit 7, 6:
Bit 5, 4:
Bit 3 ~0
4.2.4 Set0.Reg3 - IR Control Register/Set Select Register (UCR/SSR):
These two registers share the same address. In all Register Sets, Set Select Register (SSR) can be
programmed to select a desired Set but IR Control Register can only be programmed in Set 0 and Set
1. In other words, writing to Reg3 in Sets other than Set 0 and Set 1 will not affect IR Control
Register. The mapping of entry Set and programming value is shown as follows.
7
0
1
1
1
1
1
1
1
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6
1
1
1
1
1
1
RXFTL1, 0 - Receiver FIFO Threshold Level
Its definition is the same as Legacy IR. RXTH_I becomes 1 when the Receiver FIFO
Threshold Level is equal or larger than the defined value shown as follow.
Note that the FIFO Size is selectable in SET2.Reg4.
TXFTL1, 0 - Transmitter FIFO Threshold Level
TXTH_I (Transmitter Threshold Level Interrupt) is set to 1 when the Transmitter
Threshold Level is less than the programmed value shown as follows.
Same as in Legacy IR Mode
RXFTL1, 0
TXFTL1, 0
(Bit 7, 6)
(Bit 5, 4)
Any combination except those used in SET 2~7
00
01
10
11
00
01
10
11
¡Ñ
5
1
1
1
1
1
1
¡Ñ
4
0
0
0
1
1
1
RX FIFO Threshold Level
TX FIFO Threshold Level
(FIFO Size: 16-byte)
(FIFO Size: 16-byte)
SSR Bits
¡Ñ
3
0
0
1
1
0
0
- 57 -
14
13
1
4
8
1
3
9
¡Ñ
2
0
1
0
1
0
1
¡Ñ
1
0
0
0
0
0
0
W83977F/ W83977AF
RX FIFO Threshold Level
TX FIFO Threshold Level
Publication Release Date: March 1998
¡Ñ
(FIFO Size: 32-byte)
(FIFO Size: 32-byte)
0
0
0
0
0
0
0
Value
0xEC
0xE0
0xE4
0xE8
0xF0
0xF4
Hex
16
26
17
25
¡Ð
¡Ð
1
4
1
7
PRELIMINARY
Selected
Set 0
Set 2
Set 3
Set 4
Set 5
Set 6
Set 7
Set1
Revision 0.58
Set

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