W83977A Winbond Electronics Corp America, W83977A Datasheet - Page 133

• Manufacturer Part Number: W83977A
• Description: Winbond I/O
• Manufacturer: Winbond Electronics Corp America

CRF7 (Default 0x00)
CRFE, FF (Default 0x00)
Bit 5: MOUIRQEN.
Bit 4: KBCIRQEN.
Bit 3: PRTIRQEN.
Bit 2: FDCIRQEN.
Bit 1: URAIRQEN.
Bit 0: URBIRQEN.
Bit 7 - 1: Reserved. Return zero when read.
Bit 0: SMI_EN.
This bit is the
logic, setting this bit enables the
cleared, only the IRQ status bit in CRF3 is set, and no SMI interrupt is generated on the pin
Reserved for Winbond test.
= 0
= 1
= 0
= 1
= 0
= 1
= 0
= 1
= 0
= 1
= 0
= 1
= 0
= 1
disable the generation of an
enable the generation of an
disable the generation of an
enable the generation of an
disable the generation of an
enable the generation of an
disable the generation of an
enable the generation of an
disable the generation of an
enable the generation of an
disable the generation of an
enable the generation of an
Disable
Enable
SMI
output pin enable bit. When an
SMI
SMI
SMI
-122-
interrupt to be generated on the pin
SMI
SMI
SMI
SMI
SMI
SMI
SMI
SMI
SMI
SMI
SMI
SMI
interrupt due to MOUSE's IRQ.
interrupt due to KBC's IRQ.
interrupt due to printer port's IRQ.
interrupt due to FDC's IRQ.
interrupt due to UART A's IRQ.
interrupt due to UART B's IRQ.
interrupt due to MOUSE's IRQ.
interrupt due to KBC's IRQ.
interrupt due to printer port's IRQ.
interrupt due to FDC's IRQ.
interrupt due to UART A's IRQ.
interrupt due to UART B's IRQ.
SMI
event is raised on the output of the
Publication Release Date: March 1998
W83977TF
PRELIMINARY
SMI
. If this bit is
Revision 0.62
SMI
SMI
.