t89c51rd2-slscl ATMEL Corporation, t89c51rd2-slscl Datasheet - Page 57

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t89c51rd2-slscl

Manufacturer Part Number
t89c51rd2-slscl
Description
0 To 40 Mhz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
4243G–8051–05/03
Table 35. Default Values
After programming the part by ISP, the BSB must be reset (00h) in order to allow the
application to boot at 0000h.
The content of the Software Security Byte (SSB) is described in
To assure code protection from a parallel access, the HSB must also be at the required
level.
The three lock bits provide different levels of protection for the on-chip code and data,
when programmed according to Table 31.
Table 36. Program Lock bits of the SSB
Note:
Note:
Note:
Note:
Mnemonic
Security
level
Program Lock Bits
HSB
BSB
SBV
SSB
1
2
3
U: unprogrammed or "one" level.
P: programmed or "zero" level.
X:do not care
WARNING: Security level 2 and 3 should only be programmed after Flash and code
verification.
LB0
Boot Status Byte
Software Boot Vector
Copy of the Hardware security byte
Software Security Byte
Copy of the Manufacturer Code
Copy of the Device ID #1: Family Code
Copy of the Device ID #2: memories size
and type
Copy of the Device ID # 3: name and
revision
U
P
X
LB1
U
U
P
Protection Description
No program lock features enabled.
following commands are disabled:
- program byte
- program status byte and boot vector
- erase status byte and boot vector
Same as 2 and following commands also disabled:
- read byte
- read status byte and boot vector
- blank check
- program SSB level2
FFh
FCh
18h or 1Bh
FFh
58h
D7h
FCh
FFh
Default Value
ATMEL Wireless and
Microcontrollers
C51 X2, Electrically Erasable
T89C51RD2
size
T89C51RD2
Table 30
T89C51RD2
and
, revision 0
memories
Table 31
57

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