t89c51rd2-slscl ATMEL Corporation, t89c51rd2-slscl Datasheet - Page 7

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t89c51rd2-slscl

Manufacturer Part Number
t89c51rd2-slscl
Description
0 To 40 Mhz Flash Programmable 8-bit Microcontroller
Manufacturer
ATMEL Corporation
Datasheet
Table 2. Pin Description (Continued)
4243G–8051–05/03
Reset
ALE/PROG
PSEN
EA
XTAL1
XTAL2
Mnemonic
DIL
12
13
14
15
16
17
30
29
31
19
18
9
Pin Number
LCC
14
15
16
17
18
19
10
33
32
35
21
20
VQFP 1.4
10
11
12
13
27
26
29
15
14
8
9
4
Type
O (I)
I/O
O
O
O
O
I
I
I
I
I
I
Name and Function
INT0 (P3.2): External interrupt 0
INT1 (P3.3): External interrupt 1
T0 (P3.4): Timer 0 external input
T1 (P3.5): Timer 1 external input
WR (P3.6): External data memory write strobe
RD (P3.7): External data memory read strobe
Reset: A high on this pin for two machine cycles while the oscillator is running, resets
the device. An internal diffused resistor to V
external capacitor to V
system reset.
Address Latch Enable/Program Pulse: Output pulse for latching the low byte of the
address during an access to external memory. In normal operation, ALE is emitted at a
constant rate of 1/6 (1/3 in X2 mode) the oscillator frequency, and can be used for
external timing or clocking. Note that one ALE pulse is skipped during each access to
external data memory. This pin is also the program pulse input (PROG) during Flash
programming. ALE can be disabled by setting SFR’s AUXR.0 bit. With this bit set, ALE
will be inactive during internal fetches.
Program Store ENable: The read strobe to external program memory. When
executing code from the external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to
external data memory. PSEN is not activated during fetches from internal program
memory.
External Access Enable: EA must be externally held low to enable the device to fetch
code from external program memory locations 0000H to FFFFH (RD). If security level
1 is programmed, EA will be internally latched on Reset.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
Crystal 2: Output from the inverting oscillator amplifier
CC
. This pin is an output when the hardware watchdog forces a
SS
permits a power-on reset using only an
T89C51RD2
7

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