at91sam9g35-cu ATMEL Corporation, at91sam9g35-cu Datasheet - Page 26

• Manufacturer Part Number: at91sam9g35-cu
• Description: At91sam Arm-based Embedded Mpu
• Manufacturer: ATMEL Corporation

7.1
7.2
7.2.1
7.2.2
7.3
7.3.1
7.3.2
26
Memory Mapping
Embedded Memories
External Memories
SAM9G35
Internal SRAM
Internal ROM
External Bus Interface
Static Memory Controller
A first level of address decoding is performed by the AHB Bus Matrix, i.e., the implementation of
the Advanced High performance Bus (AHB) for its Master and Slave interfaces with additional
features.
Decoding breaks up the 4 Gbytes of address space into 16 banks of 256 Mbytes. Banks 1 to 6
are directed to the EBI that associates these banks to the external chip selects, EBI_NCS0 to
EBI_NCS5. Bank 0 is reserved for the addressing of the internal memories, and a second level
of decoding provides 1 Mbyte of internal memory area. Bank 15 is reserved for the peripherals
and provides access to the Advanced Peripheral Bus (APB).
Other areas are unused and performing an access within them provides an abort to the master
requesting such an access.
The SAM9G35 embeds a total of 32 Kbytes of high-speed SRAM.
After reset and until the Remap Command is performed, the SRAM is only accessible at address
0x0030 0000.
After Remap, the SRAM also becomes available at address 0x0.
The SAM9G35 embeds an Internal ROM, which contains the SAM-BA program.
At any time, the ROM is mapped at address 0x0010 0000. It is also accessible at address 0x0
(BMS = 1) after the reset and before the Remap Command.
• Integrates three External Memory Controllers:
• Additional logic for NAND Flash and CompactFlash
• Up to 26-bit Address Bus (up to 64 MBytes linear per chip select)
• Up to 6 chips selects, Configurable Assignment:
• 8- or 16-bit Data Bus
• Multiple Access Modes supported
– Static Memory Controller
– DDR2/SDRAM Controller
– MLC NAND Flash ECC Controller
– Static Memory Controller on NCS0, NCS1, NCS2, NCS3, NCS4, NCS5
– DDR2/SDRAM Controller (SDCS) or Static Memory Controller on NCS1
– Optional NAND Flash support on NCS3
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 16-byte page size)
®
11053AS–ATARM–27-Jul-11