at91sam9g35-cu ATMEL Corporation, at91sam9g35-cu Datasheet - Page 27

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at91sam9g35-cu

Manufacturer Part Number
at91sam9g35-cu
Description
At91sam Arm-based Embedded Mpu
Manufacturer
ATMEL Corporation
Datasheet

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7.3.3
11053AS–ATARM–27-Jul-11
DDR2SDR Controller
• Multiple device adaptability
• Multiple Wait State Management
• Slow Clock mode supported
• Supports 8-bank DDR2, LPDDR2, SDR and LPSDR
• Numerous Configurations Supported
• Programming Facilities
• Energy-saving Capabilities
• SDRAM Power-up Initialization by Software
• CAS Latency of 2, 3 Supported
• Auto Precharge Command Not Used
• SDR-SDRAM with 16-bit Datapath and Eight Columns Not Supported
– Control signals programmable setup, pulse and hold time for each Memory Bank
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
– 2K, 4K, 8K, 16K Row Address Memory Parts
– SDRAM with 8 Internal Banks
– SDR-SDRAM with 32-bit Data Path
– DDR2/LPDDR with 16-bit Data Path
– One Chip Select for SDRAM Device (256 Mbyte Address Space)
– Multibank Ping-pong Access (Up to 8 Banks Opened at Same Time = Reduces
– Timing Parameters Specified by Software
– Automatic Refresh Operation, Refresh Rate is Programmable
– Automatic Update of DS, TCR and PASR Parameters (LPSDR)
– Self-refresh, Power-down and Deep Power Modes Supported
– Clock Frequency Change in Precharge Power-down Mode Not Supported
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SAM9G35
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