c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 166

• Manufacturer Part Number: c8051t617
• Description: Mixed Signal Byte-programmable Eprom Mcu
• Manufacturer: Silicon Laboratories

C8051T610/1/2/3/4/5/6/7
SFR Definition 17.3. SPI0CKR: SPI0 Clock Rate
SFR Definition 17.4. SPI0DAT: SPI0 Data
166
Bits 7–0: SPI0DAT: SPI0 Transmit and Receive Data.
Bits 7–0: SCR7–SCR0: SPI0 Clock Rate.
Example: If SYSCLK = 2 MHz and SPI0CKR = 0x04,
f
SCK
SCR7
f
R/W
Bit7
SCK
R/W
Bit7
=
=
The SPI0DAT register is used to transmit and receive SPI0 data. Writing data to SPI0DAT
places the data into the transmit buffer and initiates a transfer when in Master Mode. A read
of SPI0DAT returns the contents of the receive buffer.
These bits determine the frequency of the SCK output when the SPI0 module is configured
for master mode operation. The SCK clock frequency is a divided version of the system
clock, and is given in the following equation, where SYSCLK is the system clock frequency
and SPI0CKR is the 8-bit value held in the SPI0CKR register.
for 0 <= SPI0CKR <= 255
200kHz
f
SCK
------------------------- -
2
2000000
SCR6
×
R/W
Bit6
R/W
Bit6
(
=
4
+
------------------------------------------------ -
2
×
1
)
(
SPI0CKR
SCR5
SYSCLK
R/W
Bit5
R/W
Bit5
SCR4
+
R/W
Bit4
R/W
Bit4
1
)
Rev. 0.3
SCR3
R/W
Bit3
R/W
Bit3
SCR2
R/W
Bit2
R/W
Bit2
SCR1
R/W
Bit1
R/W
Bit1
SCR0
R/W
Bit0
R/W
Bit0
SFR Address:
00000000
SFR Address:
Reset Value
00000000
Reset Value
0xA2
0xA3