c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 22

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c8051t617

Manufacturer Part Number
c8051t617
Description
Mixed Signal Byte-programmable Eprom Mcu
Manufacturer
Silicon Laboratories
Datasheet
C8051T610/1/2/3/4/5/6/7
1.2.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The lower 128 bytes of
RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as four banks of
general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
Program memory consists of 8 or 16 kB of byte-programmable memory. The EPROM memory requires a
special off-chip programming voltage of 6.5 V applied to the VPP pin when programming. Each location in
EPROM memory is programmable only once (i.e. non-erasable). See Figure 1.5 for the MCU system
memory map.
22
0x3DFF
0x3E00
0x1FFF
0x0000
0x2000
0x0000
PROGRAM/DATA MEMORY
On-Chip Memory
C8051T612/3/4/5
C8051T610/1/6/7
16 kB EPROM
8 kB EPROM
RESERVED
RESERVED
(EPROM)
Figure 1.5. On-Board Memory Map
0xFFFF
0x03FF
0x0400
0x0000
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
Rev. 0.3
XRAM - 1024 Bytes
0x0000 to 0x03FF, wrapped
(accessable using MOVX
Same 1024 bytes as from
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
on 1 kB boundaries
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's

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