c8051t617 Silicon Laboratories, c8051t617 Datasheet - Page 80

• Manufacturer Part Number: c8051t617
• Description: Mixed Signal Byte-programmable Eprom Mcu
• Manufacturer: Silicon Laboratories

C8051T610/1/2/3/4/5/6/7
9.2.
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The CIP-51 memory organization is
shown in Figure 9.2.
9.2.1. Program Memory
The CIP-51 core has a 64k-byte program memory space. The C8051T610/1/6/7 and C8051T612/3/4/5
implement 16 and 8 kB, respectively, of this program memory space as byte-programmable memory, orga-
nized in a contiguous block from addresses 0x0000 to 0x3FFF or 0x0000 to 0x1FFF. Addresses above
0x3E00 are reserved on the 16 kB devices.
Program memory is read-only from within firmware. Individual program memory bytes can be read using
the MOVC instruction. This facilitates the use of EPROM space for constant storage.
80
Memory Organization
0x3DFF
0x1FFF
0x3E00
0x0000
0x2000
0x0000
PROGRAM/DATA MEMORY
C8051T612/3/4/5
16 kB EPROM
C8051T610/1
8 kB EPROM
RESERVED
RESERVED
(EPROM)
Figure 9.2. Memory Map
0xFFFF
0x03FF
0x0400
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 0.3
XRAM - 1024 Bytes
0x0000 to 0x03FF, wrapped
(accessable using MOVX
Same 1024 bytes as from
(Indirect Addressing
(Direct and Indirect
EXTERNAL DATA ADDRESS SPACE
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
on 1 kB boundaries
Bit Addressable
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's