mc9s08dn60 Freescale Semiconductor, Inc, mc9s08dn60 Datasheet - Page 320

• Manufacturer Part Number: mc9s08dn60
• Description: Hcs08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

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Num C
Appendix A Electrical Characteristics
320
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TRIM register at default value (0x80) and FTRIM control bit at default value (0x0).
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this
specification assumes it is already running.
This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled (BLPE,
BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it is already
running.
Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise injected
into the FLL circuitry via V
interval.
Jitter measurements are based upon a 48 MHz MCGOUT clock frequency.
625 ns represents 5 time quanta for CAN applications, under worst case conditions of 8 MHz CAN bus clock, 1 Mbps CAN bus
speed, and 8 time quanta per bit for bit time settings. 5 time quanta is the minimum time between a synchronization edge and the
sample point of a bit using 8 time quanta per bit.
Below D
is already in lock, then the MCG may stay in lock.
Below D
Table A-12. MCG Frequency Specifications (Temperature Range = –40 to 125°C Ambient) (continued)
D Lock time - FLL
D Lock time - PLL
D
D
lock
unl
Loss of external clock minimum frequency - RANGE =
0
Loss of external clock minimum frequency - RANGE =
1
minimum, the MCG will not exit lock if already in lock. Above D
minimum, the MCG is guaranteed to enter lock. Above D
DD
and V
Rating
SS
and variation in crystal oscillator frequency increase the C
MC9S08DN60 Series Data Sheet, Rev 2
Symbol
f
t
f
t
loc_high
lock
pll_lock
loc_low
fll_lock
maximum, the MCG will not enter lock. But if the MCG
unl
maximum, the MCG is guaranteed to exit lock.
(16/5) x f
(3/5) x f
Min
—
—
int
int
Typical
Jitter
—
—
—
—
Freescale Semiconductor
percentage for a given
1075(1/
1075(1/
t
t
pll_acquire+
fll_acquire+
Max
—
—
f
pll_ref)
f
int_t)
BUS
.
Unit
kHz
kHz
s
s