mc9s08dn60 Freescale Semiconductor, Inc, mc9s08dn60 Datasheet - Page 95

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mc9s08dn60

Manufacturer Part Number
mc9s08dn60
Description
Hcs08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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6.5.4.3
6.5.4.4
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
Freescale Semiconductor
PTDPE[7:0]
PTDSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
rate control to the desired value to ensure correct operation.
W
W
R
R
PTDPE7
PTDSE7
Internal Pull Enable for Port D Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTD pin. For port D pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port D bit n.
1 Internal pull-up/pull-down device enabled for port D bit n.
Output Slew Rate Enable for Port D Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTD pin. For port D pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port D bit n.
1 Output slew rate control enabled for port D bit n.
Port D Pull Enable Register (PTDPE)
0
Port D Slew Rate Enable Register (PTDSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
PTDPE6
PTDSE6
Figure 6-26. Internal Pull Enable for Port D Register (PTDPE)
Figure 6-27. Slew Rate Enable for Port D Register (PTDSE)
0
0
6
6
Table 6-24. PTDPE Register Field Descriptions
Table 6-25. PTDSE Register Field Descriptions
PTDPE5
PTDSE5
MC9S08DN60 Series Data Sheet, Rev 2
0
0
5
5
PTDPE4
PTDSE4
NOTE
0
0
4
4
Description
Description
PTDPE3
PTDSE3
3
0
3
0
PTDPE2
PTDSE2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTDPE1
PTDSE1
0
0
1
1
PTDPE0
PTDSE0
0
0
0
0
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