m38039g6hsp Renesas Electronics Corporation., m38039g6hsp Datasheet - Page 66

• Manufacturer Part Number: m38039g6hsp
• Description: Single-chip 8-bit Cmos Microcomputer
• Manufacturer: Renesas Electronics Corporation.

3803 Group (Spec.H QzROM version)
Rev.1.10
REJ03B0166-0110
Fig 61. System clock generating circuit block diagram (Single-chip mode)
Interrupt disable flag l
Notes1: Either high-speed, middle-speed or low-speed mode is selected by bits 7 and 6 of the CPU mode register.
Interrupt request
2: f(X
3: When bit 0 of MISRG is “0”, timer 1 is set “01
4: Although a feed-back resistor exists on-chip, an external feed-back resistor may be needed depending on conditions.
X
When low-speed mode is selected, set port X
supplied as the count source at executing STP instruction.
appropriate value to them in accordance with oscillation stabilizing time required by the using oscillator because nothing is
automatically set into timer 1 and prescaler 12.
CIN
IN
Nov 14, 2005
X
)/16 is supplied as the count source to the prescaler 12 at reset, the count source before executing the STP instruction is
IN
Q
(Note 4)
S
R
“1”
Reset
X
COUT
X
STP
instruction
OUT
“0”
Port X
switch bit
Main clock stop bit
High-speed or
middle-speed mode
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Main clock division ratio
selection bits (Note 1)
Low-speed
mode
C
instruction
1/2
16
C
” and prescaler 12 is set “FF
switch bit (b4) to “1”.
High-speed or
low-speed mode
WIT
1/4
S
R
Divider
Main clock division ratio
selection bits (Note 1)
Q
Middle-speed mode
16
” automatically. When bit 0 of MISRG is “1” , set the
Q
S
R
Prescaler 12
STP
instruction
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Timing φ (internal clock)
(Note 3)
Timer 1
Reset or
STP instruction
(Note 2)
Reset