m38039g6hsp Renesas Electronics Corporation., m38039g6hsp Datasheet - Page 86

• Manufacturer Part Number: m38039g6hsp
• Description: Single-chip 8-bit Cmos Microcomputer
• Manufacturer: Renesas Electronics Corporation.

3803 Group (Spec.H QzROM version)
Rev.1.10
REJ03B0166-0110
Notes on Interrupts
1. Change of relevant register settings
When the setting of the following registers or bits is changed, the
interrupt request bit may be set to “1”. When not requiring the
interrupt occurrence synchronized with these setting, take the
following sequence.
• Interrupt edge selection register (address 003A
• Timer XY mode register (address 0023
• Timer Z mode register (address 002A
Set the above listed registers or bits as the following sequence.
Fig 4.
<Reason>
When setting the followings, the interrupt request bit may be set
to “1”.
• When setting external interrupt active edge
• When switching interrupt sources of an interrupt vector
Concerned register:Interrupt edge selection register
address where two or more interrupt sources are allocated.
Concerned register: Interrupt source selection register (address
0039
Set the corresponding interrupt enable bit to “0” (disabled).
Set the corresponding interrupt enable bit to “1” (enabled).
Set the interrupt edge select bit (active edge switch bit)
or the interrupt (source) select bit to “1”.
16
Set the corresponding interrupt request bit to “0”
)
Sequence of changing relevant register
Nov 14, 2005
NOP (one or more instructions)
(no interrupt request issued).
(address 003A
Timer XY mode register (address 0023
Timer Z mode register (address 002A
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16
)
16
16
)
)
16
)
16
16
)
)
2. Check of interrupt request bit
When executing the BBC or BBS instruction to an interrupt
request bit of an interrupt request register immediately after this
bit is set to “0”, execute one or more instructions before
executing the BBC or BBS instruction.
Fig 5.
<Reason>
If the BBC or BBS instruction is executed immediately after an
interrupt request bit of an interrupt request register is cleared to
“0”, the value of the interrupt request bit before being cleared to
“0” is read.
Clear the interrupt request bit to “0” (no interrupt issued)
Sequence of check of interrupt request bit
Execute the BBC or BBS instruction
NOP (one or more instructions)
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.