sc16is762ipw NXP Semiconductors, sc16is762ipw Datasheet - Page 7

• Manufacturer Part Number: sc16is762ipw
• Description: Dual Uart With I2c-bus/spi Interface, 64 Bytes Of Transmit And Receive Fifos, Irda Sir Built-in Support
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
[1]
[2]
[3]
[4]
[5]
SC16IS752_SC16IS762_6
Product data sheet
Symbol
RESET
RTSA
RTSB
RXA
RXB
TXA
TXB
V
V
V
XTAL1
XTAL2
DD
SS
SS
Selectable with IOControl register bit 2.
Selectable with IOControl register bit 1.
See
HVQFN package die supply ground is connected to both V
ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias
need to be incorporated in the PCB in the thermal pad region.
XTAL2 should be left open when XTAL1 is driven by an external clock.
Section 7.4 “Hardware Reset, Power-On Reset (POR) and Software
Pin description
Pin
TSSOP28
5
1
17
4
24
3
23
8
22
-
6
7
…continued
HVQFN32
2
30
16
1
23
32
22
5, 13, 28
12, 21,
29
center
pad
3
4
[4]
[4]
Type Description
I
O
O
I
I
O
O
-
-
-
I
O
Rev. 06 — 19 December 2006
Dual UART with I
Hardware reset (active LOW)
UART request to send (active LOW), channel A. A logic 0 on the RTSA
pin indicates the transmitter has data ready and waiting to send. Writing
a logic 1 in the Modem Control Register MCR[1] will set this pin to a
logic 0, indicating data is available. After a reset this pin is set to a logic 1.
This pin only affects the transmit and receive operations when Auto-RTS
function is enabled via the Enhanced Features Register (EFR[6]) for
hardware flow control operation.
UART request to send (active LOW), channel B. A logic 0 on the RTSB
pin indicates the transmitter has data ready and waiting to send. Writing
a logic 1 in the Modem Control Register MCR[1] will set this pin to a
logic 0, indicating data is available. After a reset this pin is set to a logic 1.
This pin only affects the transmit and receive operations when Auto-RTS
function is enabled via the Enhanced Features Register (EFR[6]) for
hardware flow control operation.
Channel A receiver input. During the local Loopback mode, the RXA
input pin is disabled and TXA data is connected to the UART RXA input
internally.
Channel B receiver input. During the local Loopback mode, the RXB
input pin is disabled and TXB data is connected to the UART RXB input
internally.
Channel A transmitter output. During the local Loopback mode, the TXA
output pin is disabled and TXA data is internally connected to the UART
RXA input.
Channel B transmitter output. During the local Loopback mode, the TXB
output pin is disabled and TXB data is internally connected to the UART
RXB input.
Power supply
Ground
The center pad on the back side of the HVQFN32 package is metallic
and should be connected to ground on the printed-circuit board.
Crystal input or external clock input. A crystal can be connected between
XTAL1 and XTAL2 to form an internal oscillator circuit (see
Alternatively, an external clock can be connected to this pin.
Crystal output. (See also XTAL1.) XTAL2 is used as a crystal oscillator
output
SS
[5]
.
pins and exposed center pad. V
Reset”.
2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
[3]
SS
pins must be connected to supply
© NXP B.V. 2006. All rights reserved.
Figure
11).
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