wm8594seft-v Wolfson Microelectronics plc, wm8594seft-v Datasheet - Page 57

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wm8594seft-v

Manufacturer Part Number
wm8594seft-v
Description
24-bit 192khz 2vrms Multi-channel Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
Production Data
R12 (0Ch) – Device Enable Register (ENABLE)
DAC2_COPY_DAC1
Figure 37 R12 – Device Enable Register
R13 (0Dh) – ADC Control Register 1 (ADC_CTRL1)
w
Default
Default
Default
Default
Write
Write
Write
Write
Read
Read
Read
Read
Bit #
Bit #
Bit #
Bit #
ADC_FMT[1:0]
ADC_WL[1:0]
GLOBAL_EN
ADC_BCP
ADC_LRP
Function
Function
LRSWAP
ADC_
N/A
N/A
N/A
15
15
0
7
0
0
7
0
0
0
0
Device Global Enable
0 = ADC, DAC and PGA ramp control circuitry disabled
1 = ADC, DAC and PGA ramp control circuitry enabled
DAC2 Configuration Control
0 = DAC2 settings independent of DAC1
1 = DAC2 settings are the same as DAC1
ADC Audio Interface Format
00 = Right Justified
01 = Left Justified
10 = I
11 = DSP
ADC Audio Interface Word Length
00 = 16-bit
01 = 20-bit
10 = 24-bit
11 = 32-bit (not available in Right Justified mode)
ADC BCLK Polarity
0 = ADCBCLK not inverted - data latched on rising edge of BCLK
1 = ADCBCLK inverted - data latched on falling edge of BCLK
ADC LRCLK Polarity
0 = ADCLRCLK not inverted
1 = ADCLRCLK inverted
ADC_EN
N/A
N/A
N/A
14
14
0
0
6
0
0
0
0
6
0
2
S
ADC_ZCEN
ADC_LRP
N/A
N/A
13
13
0
0
5
0
0
1
5
0
ADC_HPD
ADC_BCP
N/A
N/A
12
12
0
0
4
0
0
0
4
0
Description
Description
ADC_DATA_SEL[1:0]
N/A
N/A
11
11
0
3
0
3
0
0
0
1
ADC_WL[1:0]
N/A = Not Applicable (no function implemented)
N/A = Not Applicable (no function implemented)
N/A
N/A
10
10
0
0
2
0
0
0
2
0
COPY_DAC1
ADCL_INV
DAC2_
N/A
9
0
0
1
0
9
0
1
1
PD Rev 4.1 July 2008
ADC_FMT[1:0]
GLOBAL_EN
WM8594
ADCR_INV
N/A
8
0
0
0
0
8
0
0
0
57

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