74LVC2G14GW,125 NXP Semiconductors, 74LVC2G14GW,125 Datasheet

IC SCHMITT-TRIG SGL INV SC88-6

74LVC2G14GW,125

Manufacturer Part Number
74LVC2G14GW,125
Description
IC SCHMITT-TRIG SGL INV SC88-6
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC2G14GW,125

Number Of Circuits
2
Logic Type
Inverter with Schmitt Trigger
Package / Case
SC-70-6, SC-88, SOT-363
Number Of Inputs
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V, 5 V
Logical Function
Inverter Schmit Trig
Number Of Elements
2
Input Type
Schmitt Trigger
Propagation Delay Time
12ns
Operating Supply Voltage (typ)
1.8/2.5/3.3/5V
Package Type
SOT-363
Operating Temp Range
-40C to 125C
Pin Count
6
Quiescent Current
40uA
Output Type
Schmitt Trigger
Technology
CMOS
Mounting
Surface Mount
Operating Temperature Classification
Automotive
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.65V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4840-2
74LVC2G14GW,125
74LVC2G14GW-G
74LVC2G14GW-G
935273895125

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC2G14GW,125
Manufacturer:
NXP Semiconductors
Quantity:
2 350
1. General description
2. Features and benefits
3. Applications
The 74LVC2G14 provides two inverting buffers with Schmitt-trigger action.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of
this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the inputs
makes the circuit tolerant of slower input rise and fall time. This device is fully specified for
partial power-down applications using I
preventing the damaging backflow current through the device when it is powered down.
74LVC2G14
Dual inverting Schmitt trigger with 5 V tolerant input
Rev. 5 — 29 October 2010
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant inputs for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
ESD protection:
±24 mA output drive (V
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Input accepts voltages up to 5 V
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C.
Wave and pulse shaper
Astable multivibrator
Monostable multivibrator
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CC
= 3.0 V)
OFF
. The I
OFF
circuitry disables the output,
Product data sheet

Related parts for 74LVC2G14GW,125

74LVC2G14GW,125 Summary of contents

Page 1

Dual inverting Schmitt trigger with 5 V tolerant input Rev. 5 — 29 October 2010 1. General description The 74LVC2G14 provides two inverting buffers with Schmitt-trigger action. The inputs can be driven from either 3 ...

Page 2

... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Temperature range −40 °C to +125 °C 74LVC2G14GW −40 °C to +125 °C 74LVC2G14GV −40 °C to +125 °C 74LVC2G14GM −40 °C to +125 °C 74LVC2G14GF −40 °C to +125 °C 74LVC2G14GN −40 °C to +125 °C 74LVC2G14GS 5 ...

Page 3

... NXP Semiconductors 7. Pinning information 7.1 Pinning 74LVC2G14 GND 001aab672 Fig 4. Pin configuration SOT363 and SOT457 7.2 Pin description Table 3. Pin description Symbol 1A GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74LVC2G14 Product data sheet Dual inverting Schmitt trigger with 5 V tolerant input ...

Page 4

... NXP Semiconductors 9. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage O I output current ...

Page 5

... NXP Semiconductors 11. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = −40 °C to +85 °C T amb V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF I supply current CC Δ ...

Page 6

... NXP Semiconductors Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter I power-off leakage current OFF I supply current CC ΔI additional supply current CC [1] All typical values are measured at maximum V Table 8. Transfer characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see ...

Page 7

... NXP Semiconductors 12. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter Conditions t propagation delay nA to nY; see power dissipation capacitance [1] Typical values are measured the same as t and PLH PHL [ used to determine the dynamic power dissipation (P PD × ...

Page 8

... NXP Semiconductors Table 10. Measurement points Supply voltage 1. 2.7 V 2 3 5.5 V Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. ...

Page 9

... NXP Semiconductors 14. Waveforms transfer characteristics T− Fig 9. Transfer characteristic Fig 11. Typical transfer characteristics 74LVC2G14 Product data sheet Dual inverting Schmitt trigger with 5 V tolerant input mna207 Fig 10. Definition (mA 0.5 1 All information provided in this document is subject to legal disclaimers. Rev. 5 — 29 October 2010 ...

Page 10

... NXP Semiconductors 15. Application information The slow input rise and fall times cause additional power dissipation, which can be calculated using the following formula add P = additional power dissipation (μW); add f = input frequency (MHz input rise time (ns input fall time (ns ΔI CC(AV) ΔI CC(AV) ...

Page 11

... NXP Semiconductors 16. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.30 0.25 mm 0.1 0.8 0.20 0.10 OUTLINE VERSION IEC SOT363 Fig 14. Package outline SOT363 (SC-88) 74LVC2G14 Product data sheet Dual inverting Schmitt trigger with 5 V tolerant input ...

Page 12

... NXP Semiconductors Plastic surface-mounted package (TSOP6); 6 leads y 6 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) UNIT 0.1 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT457 Fig 15. Package outline SOT457 (SC-74) 74LVC2G14 Product data sheet Dual inverting Schmitt trigger with 5 V tolerant input ...

Page 13

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 14

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 17 ...

Page 15

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 16

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 17

... NXP Semiconductors 17. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test 18. Revision history Table 13. Revision history Document ID Release date 74LVC2G14 v.5 20101029 • Modifications: Added type number 74LVC2G14GN (SOT1115/XSON6 package). • ...

Page 18

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 19

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 20. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVC2G14 Product data sheet Dual inverting Schmitt trigger with 5 V tolerant input 19 ...

Page 20

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 8 Functional description . . . . . . . . . . . . . . . . . . . 3 9 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 13 Waveforms ...

Related keywords