ep1m120 Altera Corporation, ep1m120 Datasheet
ep1m120
Manufacturer Part Number
ep1m120
Description
Programmable Logic Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP1M120.pdf
(86 pages)
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Features…
Altera Corporation
DS-MERCURY-2.2
January 2003, ver. 2.2
Note to
(1)
Typical gates
HSDI channels
LEs
ESBs
Maximum RAM bits
Maximum user I/O pins
Table 1. Mercury Device Features
High-performance programmable logic device (PLD) family (see
Table
–
–
–
–
–
System-level features
–
–
–
–
–
Each ESB can be used for two dual- or single-port RAM blocks.
(1)
Table
Integrated high-speed transceivers with support for clock data
recovery (CDR) at up to 1.25 gigabits per second (Gbps)
Look-up table (LUT)-based architecture optimized for high
speed
Advanced interconnect structure for fast routing of critical paths
Enhanced I/O structure for versatile standards and interface
support
Up to 14,400 logic elements (LEs)
Up to four general-purpose phase-locked loops (PLLs) with
programmable multiplication and delay shifting
Up to 12 PLL output ports
Dedicated multiplier circuitry for high-speed implementation of
signed or unsigned multiplication up to 16 16
Embedded system blocks (ESBs) used to implement memory
functions including quad-port RAM, true dual-port RAM, first-
in first-out (FIFO) buffers, and content-addressable memory
(CAM)
Each ESB contains 4,096 bits and can be split and used as two
2,048-bit unidirectional dual-port RAM blocks
1)
1:
®
Feature
EP1M120
120,000
49,152
Programmable Logic
4,800
303
12
8
Device Family
Mercury
EP1M350
350,000
114,688
14,400
Data Sheet
486
18
28
1
13
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