92hd98 Integrated Device Technology, 92hd98 Datasheet - Page 68

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92hd98

Manufacturer Part Number
92hd98
Description
Datasheet
Manufacturer
Integrated Device Technology
Datasheet
92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
W1
W0
Field Name
Rsvd
EnMask4
EnMask3
EnMask2
EnMask1
Reg
Get
Set
7.4.15. AFG (NID = 01h): GPIOUnsol
Byte 4 (Bits 31:24)
Bits
1
Wake enable for GPIO1: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
0
Wake enable for GPIO0: 0 = wake-up event is disabled; 1 = When HD Audio
link is powered down (RST# is asserted), a wake-up event will trigger a Status
Change Request event on the link.
Bits
31:5
Reserved.
4
Unsolicited enable mask for GPIO4. If set, and the Unsolicited Response con-
trol for this widget has been enabled, an unsolicited response will be sent when
GPIO2 is configured as input and changes state.
3
Unsolicited enable mask for GPIO3. If set, and the Unsolicited Response con-
trol for this widget has been enabled, an unsolicited response will be sent when
GPIO2 is configured as input and changes state.
2
Unsolicited enable mask for GPIO2. If set, and the Unsolicited Response con-
trol for this widget has been enabled, an unsolicited response will be sent when
GPIO2 is configured as input and changes state.
1
Unsolicited enable mask for GPIO1. If set, and the Unsolicited Response con-
trol for this widget has been enabled, an unsolicited response will be sent when
GPIO1 is configured as input and changes state.
Byte 3 (Bits 23:16)
R/W
RW
RW
R/W
R
RW
RW
RW
RW
F1900h
Default
0h
0h
Default
00000000h
0h
0h
0h
0h
68
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
POR - DAFG - ULR
Reset
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
Byte 1 (Bits 7:0)
719h
V 0.91 10/10
92HD98

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