92hd98 Integrated Device Technology, 92hd98 Datasheet - Page 73

• Manufacturer Part Number: 92hd98
• Description: Datasheet
• Manufacturer: Integrated Device Technology

92HD98
SINGLE CHIP PC AUDIO SYSTEM, CODEC+MONO SPEAKER AMPLIFIER+CAPLESS HP+LDO
IDT CONFIDENTIAL
©2009 INTEGRATED DEVICE TECHNOLOGY, INC.
Field Name
Mono0
PhAdj
Rate
Field Name
Rsvd
SwapEn
SDMSettleDisable
Reg
Get
Set
7.4.21. AFG (NID = 01h): DACMode
Byte 4 (Bits 31:24)
Bits
4
DMic0 mono select: 0 = stereo operation, 1 = mono operation (left channel du-
plicated to the right channel).
3:2
Selects what phase of the DMic clock the data should be latched:
0h = left data rising edge/right data falling edge
1h = left data center of high/right data center of low
2h = left data falling edge/right data rising edge
3h = left data center of low/right data center of high
1:0
Selects the DMic clock rate:
0h = 4.704MHz
1h = 3.528MHz
2h = 2.352MHz
3h = 1.176MHz.
Bits
31:8
Reserved.
8
Internal DAC left channel and right channel swap. 0h = not swap, 1h =
swap.
7
SDM wait-to-settle disable:
1 = at mute, the SDM switches to the mute pattern immediately
0 = at mute, the SDM switches to the mute pattern after settling (can take up to
~45ms)
Byte 3 (Bits 23:16)
R/W
RW
RW
RW
R/W
R
RW
RW
F8000h
Default
0h
0h
2h
Default
000000h
0h
0h
73
Byte 2 (Bits 15:8)
Reset
POR
POR
POR
Reset
N/A (Hard-coded)
POR
POR
Byte 1 (Bits 7:0)
780h
V 0.91 10/10
92HD98