89hpes24t6g2 Integrated Device Technology, 89hpes24t6g2 Datasheet - Page 14

• Manufacturer Part Number: 89hpes24t6g2
• Description: 24-lane, 6-port Gen2 Pcie I/o Expansion Switch
• Manufacturer: Integrated Device Technology

IDT 89HPES24T6G2 Data Sheet
JTAG
JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO
JTAG_TRST_N
1.
changes from 0 to 1. Otherwise, a race may occur if JTAG_TRST_N is deasserted (going from low to high) on a rising edge of JTAG_TCK
when JTAG_TMS is low, because the TAP controller might go to either the Run-Test/Idle state or stay in the Test-Logic-Reset state.
2.
The JTAG specification, IEEE 1149.1, recommends that JTAG_TMS should be held at 1 while the signal applied at JTAG_TRST_N
The values for this symbol were determined by calculation, not by testing.
Signal
JTAG_TRST_N
1
,
JTAG_TMS
JTAG_TDO
JTAG_TCK
JTAG_TDI
Thigh_16a,
Symbol
Tpw_16d
Tper_16a
Tlow_16a
Tdz_16c
Thld_16b
Tsu_16b
Tdo_16c
2
2
Tpw_16d
Table 12 JTAG AC Timing Characteristics
Figure 5 JTAG AC Timing Waveform
JTAG_TCK falling
JTAG_TCK rising
Reference
Tsu_16b
Tsu_16b
Thld_16b
Thld_16b
Thigh_16a
Edge
none
none
14 of 51
Min
50.0
10.0
25.0
2.4
1.0
—
—
Tlow_16a
Tlow_16a
Tdo_16c
Max
25.0
20
20
—
—
—
—
Tper_16a
Unit
ns
ns
ns
ns
ns
ns
ns
Tdz_16c
Reference
See Figure 5.
Diagram
Timing
May 7, 2008