sta8088ex STMicroelectronics, sta8088ex Datasheet
sta8088ex
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... Package: – TFBGA169 1.2 mm 0.65 pitch ■ Ambient temperature range: -40/ +85 °C Description STA8088EX is a single die standalone positioning receiver IC working on multiple constellations (GPS/GALILEO/GLONASS/QZSS). By combining the ARM946 microcontroller core with the large numbers of peripherals/ interfaces, STA8088EX provides a highly-flexible and cost effective solution for hand-held and telematic applications ...
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... SQI pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.8 Port 0 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.9 Port 1 pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 2.10 RF front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.1 RF front-end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.2 GPS/Galileo/Glonass/QZSS Base Band (G3BB) processor . . . . . . . . . . 18 3.3 MCU subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3.1 3.4 APB peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.4.1 3.4.2 3.4.3 3.4.4 3.4.5 3.4.6 3.4.7 3.4.8 3.4.9 3.4.10 3.4.11 3.4.12 2/30 AHB slaves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 EFT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDMMC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 MTU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 WDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 RTC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 MSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Doc ID 18357 Rev 1 STA8088EX ...
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... STA8088EX 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1 ECOPACK 5.2 TFBGA package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 ® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 18357 Rev 1 Contents 3/30 ...
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... FSMC memory interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 7. SQI pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 8. Port 0 pins Table 9. Port 1 pins Table 10. RF front-end pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Table 11. TCM configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 12. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 13. Thermal data Table 14. DC electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 15. TFBGA169 mechanical data Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4/29 Doc ID 18357 Rev 1 STA8088EX ...
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... It also provides clock generation via PLL, backup logic with real time clock and it supports USB2.0 standard at full speed. STA8088EX is software compatible with the ARM processor family. The device is power supplied with 1.8 V and uses three on-chip voltage regulators to internally supply the RF front-end, core logic the backup logic. In order to reduce the power consumption the chip can be directly powered with 1 ...
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... Pin description 2 Pin description 2.1 Block diagram Figure 1. STA8088EX system block diagram 6/29 Doc ID 18357 Rev 1 STA8088EX ...
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TFBGA169 ball out Table 2. TFBGA169 ball out USB_DM USB_DP A GNDIO CAN0TX (UART1_TX) (UART1_RX) CAN1TX CAN1RX B VDDIO_r2 CAN0RX (P0.8) (P0.9) MSPOUT MSPOUT MSPOUT_SD/ C SCLK LRCLK Iopwrsel_r2 VDDIO_r5 (P0.31) (P0.30) (P0.29) MMC_CMD VDD18 ...
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... Analog supply voltage for VCO (1.2 V) VRF12_RFADC Pwr Analog supply voltage for RF ADC (1.2 V) GND_LNA GND Analog supply ground for LNA (3 pins) GND_RF GND Analog supply ground to RF (12 pins) 8/29 Functions Doc ID 18357 Rev 1 STA8088EX TFBGA169 D3, G8 J7, D4 G12 B1 B11 K10 C4 M2 G5, G6, G7, H7, ...
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... STA8088EX 2.4 Main function pins Table 4. Main function pins Symbol I/O voltage RSTn 1.2 V STDBYn 1.2 V WAKEUP 1.2 V STDBY_Out 1.2 V PPS_Out VDD_IOR1 RTC_XTI 1.5 V (max) RTC_XTO 1.5 V (max) CAN0TX VDD_IOR5 CAN0RX VDD_IOR5 USB_DM/UART1_TX VDD_IOR5 USB_DP/UART1_RX VDD_IOR5 1.4 V – ADC_IN[1:8] typ range MMC_CLK VDD_IOR2 2.5 Test / emulated dedicated pins Table 5. Test/emulated dedicated pins ...
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... Functions I/O SQI Flash data I/O 3 I/O SQI Flash data I/O 2 I/O SQI Flash data I ser. O I/O SQI Flash data I ser. I Doc ID 18357 Rev 1 STA8088EX TFBGA169 C13, E10, B10, E11, A12, A11, G10, F10, A10, D11, C10, G9, C9, H10, B9, A9 F7, C7, D7, F6, E6, F5, B7, E7, F8, A7, B8, D8, F9, E9, C8, H9, ...
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... STA8088EX Table 7. SQI pins (continued) Symbol I/O Voltage SQI_SCK VDD_IOR4 SQI_CEn/ VDD_IOR4 iopwrsel_r4 SQI pins are multiplexed with P0[13:10] and P0[19] (see 2.8 Port 0 pins Port 0 consists of a 32-bit bidirectional I/O port. It can be either used as general purpose input or output port, or configured according to the associated alternate functions. ...
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... Default UART0_DTR: UART0 data terminal read A GPIO18: general purpose I/O Timer_OCMPB: extended function timer – output B compare B SQI_Cen/iopwrsel_r4: SQI Flash chip enable / I/O ring Default 4 power selection A GPIO19: general purpose I/O Doc ID 18357 Rev 1 STA8088EX TFBGA169 B3 N11 M10 L10 N10 J12 M12 M13 N12 L12 ...
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... STA8088EX Table 8. Port 0 pins (continued) Symbol I/O voltage I/O I/O P0.20 VDD_IOR2 I/O O I/O P0.21 VDD_IOR2 I/O O I/O P0.22 VDD_IOR2 I/O I/O I/O I/O P0.23 VDD_IOR2 I/O I/O P0.24 VDD_IOR2 I/O I/O P0.25 VDD_IOR2 I/O I/O P0.26 VDD_IOR2 I/O I/O P0.27 VDD_IOR2 I/O I/O P0.28 VDD_IOR2 I/O O P0.29 VDD_IOR2 I/O O P0.30 VDD_IOR2 I/O O P0.31 VDD_IOR2 I confirmed. Mode Functions Default MMC_DATA0: multimedia card data 0 A GPIO20: general purpose I/O B MAG_0GNS: GNS 3bit coding output (MAG0) Default MMC_DATA1: multimedia card data 1 ...
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... SQI_SIO2: SQI Flash data I Default UART0_TX: UART 0 Tx data / ARM Boot 1 A GPIO39: general purpose I/O C SQI_SIO3: SQI Flash data I Default FSMC_Add0: FSMC EMI address bus 0 A GPIO40: general purpose I/O Doc ID 18357 Rev 1 Functions STA8088EX TFBGA169 J11 F11 H11 G11 K12 K11 L13 K13 F7 ...
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... STA8088EX Table 9. Port 1 pins (continued) Symbol I/O Voltage I/O P1.9 VDD_IOR3 I/O P1.10 VDD_IOR3 I/O P1.11 VDD_IOR3 I/O P1.12 VDD_IOR3 I/O P1.13 VDD_IOR3 I/O P1.14 VDD_IOR3 I/O P1.15 VDD_IOR3 I/O P1.16 VDD_IOR3 I/O P1.17 VDD_IOR3 I/O P1.18 VDD_IOR3 I/O P1.19 VDD_IOR3 I/O P1.20 VDD_IOR3 I/O P1.21 VDD_IOR3 I/O P1.22 VDD_IOR3 I/O P1.23 VDD_IOR3 I/O P1.24 VDD_IOR3 I/O Mode O Default FSMC_Add1: FSMC EMI address bus 1 A GPIO41: general purpose I/O O Default FSMC_Add2: FSMC EMI address bus 2 A GPIO42: general purpose I/O ...
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... Default FSMC_Add23: FSMC EMI address bus 23 A GPIO63: general purpose I/O I/O I Low noise amplifier input O Low noise amplifier output I RF amplifier input I Input side of crystal oscillator or TCXO input O Output side of crystal oscillator Doc ID 18357 Rev 1 Functions Functions STA8088EX TFBGA169 TFBGA169 ...
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... GPS/Galileo/Glonass/QZSS Base Band (G3BB) processor STA8088EX integrates G3BB proprietary IP, which is the ST last generation high-sensitivity baseband processor fully compliant with GPS, Galileo, Glonass and QZSS satellite systems. Please refer to GPS solution specification and release notes for more details. The base band receives, from the embedded RF front-end, two separate IF signals codified in sign-magnitude digital format on 3 bits and the related clocks ...
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... NOR Flash and SRAM. 18/29 TCMcfg[1] TCMcfg[ Doc ID 18357 Rev 1 STA8088EX ITCM DTCM 80 KB 176 160 KB 112 KB 144 KB 128 KB 128 KB 144 KB 112 KB 160 176 190 ...
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... STA8088EX SQI Flash interface STA8088EX includes a high-performance interface to Serial Quad Interface (SQI) serial NOR Flash chips, to support a low-cost simple implementation. A proprietary code prefect and data write buffer architecture is provided to allow transparent read access to Serial NOR was memory mapped fetchable code. The presence of L1 Instruction cache and the ability to allocate critical sections in zero-wait state TCMs minimizes the access latency of this solution ...
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... Each 32-bit word from the system fills one entry in FIFO. The SSP includes a programmable bit rate clock divider and prescaler to generate the serial output clock SSPCLK from the on-chip clock, SSPCLKI. One combined interrupt is delivered, which is asserted from several internal maskable events. 20/29 Doc ID 18357 Rev 1 STA8088EX ...
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... STA8088EX SSP features In both master and slave configurations, the SSP has the following features: ● Parallel-to-serial conversion on data written to an internal 32-bit wide, 32-location deep transmit FIFO ● Serial-to-parallel conversion on received data, buffering 32-bit wide, 32-location deep receive FIFO ● ...
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... I C STA8088EX includes an I 3.4.6 SDMMC STA8088EX features two SD/MMC interfaces. One 52 MHz/ 8-bit (iNand Interfaces) and one 52 MHz/ 4bit (SD card interface) 3.4.7 MTU The Multi Timer Unit provides access to four interrupt generating programmable 32-bit Free- Running decrementing Counters (FRCs). The FRCs have their own clock input, allowing the counters to run from a much slower clock than the system clock ...
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... Once set by the MCU this bits is cleared by the hardware to signal to the MCU that the RTC has been updated. 3.4.12 MSP The STA8088EX provides one MSP block. 2 ● Phillips I S format: left aligned with one cycle between leading edge of frame ● ...
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... V supply voltage VDDIO 3.3 V supply voltage IDDIO VDDIO power supply current VDD18_MVR Main VR supply voltage VDD18_MVR power supply IDD18_MVR current VRF18_RFVR RF VR supply voltage 24/29 Parameter Parameter (1) Test condition Doc ID 18357 Rev 1 STA8088EX Value Unit 1.32 V 3.63 V 1.98 V 2.75 V 3.6 V -0.5 to (VDDIO + 0.5) V -0.5 to (VDDIO + 0.5) V -55 to +150 ° ...
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... STA8088EX Table 14. DC electrical characteristics (continued) Symbol Parameter VRF18_RFVR power supply IRF18_MVR current VDD_LPVR Low power VR supply voltage IDD_LPVR VDD_LPVR power supply current Pd Power dissipation Iil Low level input leakage current Iih High level input leakage current IOZ 3-state output leakage current ...
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... A and B as defined by e. The axis perpendicular to datum C of each ball must lie within this tolerance zone. 26/29 packages Data book (mm) Min. Typ. Max. 1.20 0.21 0.20 0.585 0.30 0.35 0.40 8.85 9.00 9.15 7.80 9.85 9.00 9.15 7.80 0.65 0.60 0.08 0.15 0. Doc ID 18357 Rev 1 Drawing (mm) Min. Typ. 0.22 0.27 0.16 0.20 0.57 0.585 0.30 0.35 8.90 9.00 7.80 8.90 9.00 7.80 0.65 0.60 2 tolerance values) STA8088EX ® Max. 1.07 0.32 0.24 0.60 0.40 9.10 9.10 0.08 0.15 0.05 ...
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... STA8088EX 5. The tolerance of position that controls the location of the balls within the matrix with respect to each other.For each ball there is a cylindrical tolerance zone fff perpendicular to datum C and located on true position as defined by e. The axis perpendicular to datum C of each ball must lie within this tolerance zone. ...
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... Revision history 6 Revision history Table 16. Document revision history Date 04-Jan-2010 28/29 Revision 1 Initial release. Doc ID 18357 Rev 1 STA8088EX Changes ...
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... STA8088EX Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...