scn2651 NXP Semiconductors, scn2651 Datasheet

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scn2651

Manufacturer Part Number
scn2651
Description
Programmable Communications Interface Pci
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
DESCRIPTION
The Philips Semiconductors SCN2651 PCI is a universal
synchronous/asynchronous data communications controller chip
designed for microcomputer systems. It interfaces directly to the
Philips Semiconductors SCN2650 microprocessor and may be used
in a polled or interrupt driven system environment. The SCN2651
accepts programmed instructions from the microprocessor and
supports many serial data communication disciplines, synchronous
and asynchronous, in the full or half-duplex mode.
The PCI serializes parallel data characters received from the
microprocessor for transmission. Simultaneously, it can receive
serial data and convert it into parallel data characters for input to the
microcomputer.
The SCN2651 contains a baud rate generator which can be
programmed to either accept an external clock or to generate
internal transmit or receive clocks. Sixteen different baud rates can
be selected under program control when operating in the internal
clock mode.
The PCI is constructed using Philips Semiconductors n-channel
silicon gate depletion load technology and is packaged in a 28-pin
DIP.
FEATURES
ORDERING CODE
1994 Apr 27
28-Pin Plastic Dual In-Line Package (DIP)
Synchronous operation
– 5- to 8-bit characters
– Single or double SYN operation
– Internal character synchronization
– Transparent or non-transparent mode
– Automatic SYN or DLE-SYN insertion
– SYN or DLE stripping
– Odd, even, or no parity
– Local or remote maintenance loopback mode
– Baud rate: DC to 1Mbps (1X clock)
Asynchronous operation
– 5- to 8-bit characters
– 1, 1-1/2 or 2 stop bits
– Odd, even, or no parity
– Parity, overrun and framing error detection
– Line break detection and generation
– False start bit detection
– Automatic serial echo mode
– Local or remote maintenance loopback mode
– Baud rate: DC to 1Mbps
Programmable communications interface (PCI)
DC to 62.5kbps (16X clock)
DC to 15.625kbps
(1X clock)
(64X clock)
PACKAGES
PACKAGES
1
SCN2651CC1N28
PIN CONFIGURATIONS
OTHER FEATURES
APPLICATIONS
0 C to +70 C
0 C to +70 C
Commercial
Internal or external baud rate clock
16 internal rates – 50 to 19,200 baud
Double buffered transmitter and receiver
Full or half duplex operation
TTL compatible inputs and outputs
Single 5V power supply
No system clock required
28-pin dual in-line package
Intelligent terminals
Network processors
Front-end processors
Remote data concentrators
Computer to computer links
Serial peripherals
V
CC
RxRDY
GND
R/W
RxD
TxC
CE
D6
= 5V +5%
D2
D3
D4
D5
D7
A1
A0
12
14
10
11
13
1
2
3
4
5
6
7
8
9
-40 C to +85 C
-40 C to +85 C
TOP VIEW
Not available
Industrial
DIP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
D1
D0
V
RxC
DTR
RTS
DSR
RESET
BRCLK
TxD
TxEMT/DSCHG
CTS
DCD
TxRDY
CC
Product specification
SCN2651
853-1067 12793
SOT117-2
DWG #
DWG #
SD00049

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scn2651 Summary of contents

Page 1

... It interfaces directly to the Philips Semiconductors SCN2650 microprocessor and may be used in a polled or interrupt driven system environment. The SCN2651 accepts programmed instructions from the microprocessor and supports many serial data communication disciplines, synchronous and asynchronous, in the full or half-duplex mode ...

Page 2

... BAUD RATE GENERATOR AND HOLDING REGISTER MODEM CONTROL PARAMETER 2 3 TEST CONDITIONS TEST CONDITIONS f = 1MHz C Unmeasured pins tied to ground 2 Product specification SCN2651 SYN/DLE CONTROL SYN 1 REGISTER SYN 2 REGISTER DLE REGISTER (15) TRANSMITTER TxRDY TRANSMIT DATA (19) TRANSMIT TxD SHIFT REGISTER (14) RECEIVER RxRDY RECEIVE ...

Page 3

... TEST CONDITIONS C = 100pF 100pF 100pF 100pF L , and t measured at V and V respectively. BRH BRL 0.7MHz and t R/T 3 Product specification SCN2651 LIMITS UNIT UNIT Min Typ Max V 0.8 2 0.4 2 - 150 mA and t ) and at ...

Page 4

... This section contains control circuitry and three 8-bit registers storing the SYN1, SYN2, and DLE characters provided by the CPU. These registers are used in the synchronous mode of operation to provide the characters required for synchronization, idle fill and data transparency. 4 Product specification SCN2651 Type I ...

Page 5

... CC GND 4 I Ground A high on this input performs a master reset on the SCN2651. This signal asynchronously terminates any RESET 21 I device activity and clears the mode, command and status registers. The device assumes the idle state and remains there until initialized with the appropriate control words. ...

Page 6

... Transmitter The PCI is conditioned to transmit data when the CTS input is Low and the TxEN command register bit is set. The SCN2651 indicates to the CPU that it can accept a character for transmission by setting the TxRDY status bit and asserting the TxRDY output. When the CPU writes a character into the transmit data holding register, these conditions are negated ...

Page 7

... RESET input or by performing a “read command register” operation, but are unaffected by any other read or write operation. The SCN2651 register formats are summarized in Tables and 8. Mode registers 1 and 2 define the general operational characteristics of the PCI, while the command register controls the operation within this basic framework ...

Page 8

... In synchronous mode, setting CR3 causes the transmission of the DLE register contents prior to sending the character in the transmit data holding register. CR3 should be reset in response to the next TxRDY. 8 Product specification SCN2651 MR11 MR10 Mode and Baud Rate Factor 00 = Synchronous 1X rate 01 = Asynchronous 1X rate ...

Page 9

... When this bit is set, the TxRDY output pin is low. In the automatic echo and remote loopback modes, the output is held high. SR1, the receiver ready (RxRDY) status bit, indicates the condition of the receive data holding register. If set, it indicates that a 9 Product specification SCN2651 SR1 SR0 RxRDY TxRDY 0 = Receive 0 = Transmit ...

Page 10

... CPU in the synchronous mode. SR6 and SR7 reflect the conditions of the DCD and DSR inputs respectively. A low input sets its corresponding status bit and a high input clears it. 10 Product specification SCN2651 ...

Page 11

... Apr 27 BRCLK, TxC, RxC RxD t TxD RxC (IX) READ AND WRITE BUS NOT DATA VALID VALID Product specification SCN2651 CLOCK t t BRH BRL t t R/TH R/TL 1/f BRG 1/f R/T RECEIVE t t RXS RXH t CED t DH BUS FLOATING SD00052 ...

Page 12

... Apr DATA 2 DATA 3 DATA 3 DATA DATA 2 DATA 3 12 Product specification SCN2651 SYN 1 DATA DATA 3 DATA 4 DATA 4 SD00053 ...

Page 13

... READ READ RHR READ RHR STATUS (DATA 1) (DATA DATA 2 READ RHR (DATA 1) 13 Product specification SCN2651 DATA 4 DATA 5 IGNORED READ RHR READ RHR (DATA 3) (DATA ...

Page 14

... ADDRESS BUS CONTROL BUS DATA BUS RxD EIA TO TTL CONVERT (OPT) TxD 5.0688MHz OSCILLATOR ADDRESS BUS CONTROL BUS DATA BUS RxD TxD DSR ASYNC MODEM DTR CTS RTS DCD 5.0688MHz OSCILLATOR 14 Product specification SCN2651 CRT TERMINAL PHONE LINE INTERFACE TELEPHONE LINE SD00055 ...

Page 15

... SYNCHRONOUS INTERFACE TO TELEPHONE LINES SCN2651 1994 Apr 27 RxD TxD SYNCHRONOUS RxC TERMINAL OR PERIPHERAL TxC DEVICE ADDRESS BUS CONTROL BUS DATA BUS RxD TxD PHONE RxC LINE INTERFACE TxC SYNC DCD MODEM CTS RTS DSR DTR 15 Product specification SCN2651 TELEPHONE LINE SD00056 ...

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