hys64t128020edl-3s-c Qimonda, hys64t128020edl-3s-c Datasheet - Page 15

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hys64t128020edl-3s-c

Manufacturer Part Number
hys64t128020edl-3s-c
Description
200-pin So-dimm Ddr2 Sdram Modules Ddr2 Sdram So-dimm Sdram
Manufacturer
Qimonda
Datasheet
3.3
3.3.1
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
Rev. 1.02, 2007-10
11212006-D34H-5W6Z
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0) mentioned in Component datasheet.
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 6
Timing Characteristics
Speed Grade Definitions
Symbol
t
t
t
t
t
t
t
CK
CK
CK
RAS
RC
RCD
RP
Symbol
t
t
t
t
t
t
t
t
CK
CK
CK
CK
RAS
RC
RCD
RP
DDR2–667C
–3
4–4–4
Min.
5
3
3
45
57
12
12
DDR2–800D
–25F
5–5–5
Min.
5
3.75
2.5
2.5
45
57.5
12.5
12.5
Max.
8
8
8
70k
15
Max.
8
8
8
8
70k
DDR2–667D
5–5–5
Min.
5
3.75
3
45
60
15
15
–3S
HYS64T[128/256]020EDL-[25F/2.5/3/3S/3.7]-C
Max.
8
8
8
70k
DDR2–800E
–2.5
6–6–6
Min.
5
3.75
3
2.5
45
60
15
15
4–4–4
Min.
DDR2–533C
–3.7
5
3.75
3.75
45
60
15
15
SO-DIMM DDR2 SDRAM Module
Max.
8
8
8
8
70k
Max.
8
8
8
70k
Speed Grade Definition
Speed Grade Definition
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
CK
Internet Data Sheet
Unit
t
ns
ns
ns
ns
ns
ns
ns
CK
TABLE 12
TABLE 13
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)

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