gs8662d08e GSI Technology, gs8662d08e Datasheet
gs8662d08e
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gs8662d08e Summary of contents
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... SigmaQuad-II B4 RAM is always two address pins less than the advertised index depth (e.g., the has a 1024K addressable index). Parameter Synopsis - 333 -300* -250 -200 3.0 ns 3.3 ns 4.0 ns 5.0 ns 0.45 ns 0.45 ns 0.45 ns 0.45 ns 1/37 333 MHz–167 MHz 1 1.8 V and 1.5 V I/O Bottom View -167 6.0 ns 0.50 ns © 2005, GSI Technology DD ...
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... DDQ V D14 Q14 DD DDQ V Q13 D13 DD DDQ DDQ DDQ REF V D12 Q4 DD DDQ V Q12 D3 DD DDQ V D11 Q11 SS DDQ V D10 Q10 TMS © 2005, GSI Technology TDI ...
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... DDQ DDQ DDQ DDQ DDQ REF DDQ DDQ DDQ TMS © 2005, GSI Technology TDI ...
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... DDQ DDQ DDQ DDQ DDQ REF DDQ DDQ DDQ TMS © 2005, GSI Technology TDI ...
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... DDQ DDQ DDQ DDQ DDQ REF DDQ DDQ DDQ TMS © 2005, GSI Technology TDI ...
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... Input Active Low Input Active High Input Active Low Input — Input — Input — Output — Input — Input — Output Input Input Active Low Output — Output — Supply 1.8 V Nominal Supply 1.5 or 1.8 V Nominal Supply — © 2005, GSI Technology ...
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... Read Address BWx Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 NOP Read B Write A+1 A+2 A+3 7/37 Read D Write E NOP C+1 C+2 C+3 E E+1 C C+1 C+2 C+3 E E+1 B B+1 B+2 B+3 D D+1 © 2005, GSI Technology D+2 ...
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... K K Address BWx Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 NOP Read B Write A+1 A+2 A+3 A+1 A+2 A+3 8/37 Read D Write E NOP C+1 C+2 C C+1 C+2 C B+1 B+2 B+3 D D+1 © 2005, GSI Technology E+1 E+ E+1 E+ D+2 ...
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... KHKH Power-Up Sequence (Doff controlled) Power-Up Sequence (Doff tied High) Stop Clock Interval 30ns Min 9/37 ). KCVar DLL Locking Interval (1024 Cycles) Normal Operation DLL Locking Interval (1024 Cycles) Normal Operation © 2005, GSI Technology ...
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... Data In 0 Don’t Care 0 Data In 0 Don’t Care Byte 2 Byte 1 D9–D17 D0–D8 Written Written Beat 2 Beat 3 10/37 D9–D17 Don’t Care Data In Data In Data In Byte 2 Byte 1 Byte 2 D9–D17 D0–D8 D9–D17 Written Unchanged Written Beat 4 © 2005, GSI Technology ...
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... For simplicity BWn, NWn, K, and C are not shown. Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 Bank 1 Bank 11/37 Bank © 2005, GSI Technology ...
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... Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 12/37 © 2005, GSI Technology ...
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... D1 D2 Read D2 D3 — 13/ ↑ K ↑ K ↑ K ↑ n+2½ n+1 n+1½ n+2 — Hi-Z Hi-Z — — Hi-Z Hi-Z — — — D3 Hi-Z Hi-Z — — — — © 2005, GSI Technology Q K ↑ n+2½ — — — — Q3 — Q3 ...
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... Dx stored if BWn = 0 in 4th data transfer only Write Abort No Dx stored in any of the four data transfers 14/ ↑ K ↑ K ↑ K ↑ n+1 n+1½ n+2 n+2½ © 2005, GSI Technology ...
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... Don’t Care Don’t Care Don’t Care Data In Don’t Care Data In Don’t Care Data In Don’t Care Data In Don’t Care Data In Data In Data In Data In Data In Data In Data In Data In Data In Data In Data In Data In © 2005, GSI Technology ...
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... No Dx stored in any of the four data transfers D4–D7 Don’t Care Don’t Care Data In Data In 16/ ↑ K ↑ K ↑ K ↑ n+1 n+1½ n+2 n+2½ © 2005, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 State Diagram Power-Up READ WRITE WRITE Write Address WRITE D Count = 2 D Count = D Count + 1 Always Write Address 17/37 Write NOP Load New WRITE D Count = 2 D Count = 0 Always DDR Write WRITE D Count = 1 Increment © 2005, GSI Technology ...
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... V DDQ +0.5 (≤ 2.9 V max.) DDQ +0.5 (≤ 2.9 V max.) DDQ +/–100 mA dc +/–100 mA dc 125 –55 to 125 Max. Unit 1.8 1.9 V 1.9 — V — 0. followed by signal DD DDQ REF Typ. Max © 2005, GSI Technology Unit Unit °C °C ...
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... Trise, and Tfall of inputs and clocks must be within 10% of each other. IL Overshoot Measurement and Timing 19/37 Max Units – 0.1 V REF Max Units — – 200 mV REF 5% V (DC) mV REF . REF 20% tKHKH IL © 2005, GSI Technology Notes 1 1 Notes 3,4 3,4 1 ...
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... INDOFF 0 V ≤ V ≤ Output Disable OUT DDQ 20/37 Typ. Max Conditions 1. V/ns 0. DDQ = 0.75 V Min. Max Notes – – – – © 2005, GSI Technology Unit ...
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... GSI Technology Notes Notes –40 to 85°C 650 600 600 600 255 ...
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... GSI Technology ...
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... Min Max Min Max Min Max 0.4 — 0.4 — 0.5 — 0.4 — 0.4 — 0.5 — 0.28 — 0.3 — 0.35 — and input clock are stable. DD 23/37 -200 -167 Units Notes Min Max Min Max 0.6 — 0.7 — ns 0.6 — 0.7 — ns 0.4 — 0.5 — ns © 2005, GSI Technology ...
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... Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 24/37 © 2005, GSI Technology ...
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... Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 25/37 © 2005, GSI Technology ...
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... RAM’s JTAG Port to another device in the scan chain with as little delay as possible. Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 TDO should be left unconnected Description 26/37 . The JTAG output DD © 2005, GSI Technology ...
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... JTAG TAP Block Diagram · · · · · · Boundary Scan Register 0 Bypass Register Instruction Register ID Code Register · · · · Control Signals Test Access Port (TAP) Controller 27/37 · · TDO © 2005, GSI Technology ...
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... Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 Not Used 28/37 GSI Technology JEDEC Vendor ID Code © 2005, GSI Technology 0 1 ...
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... JTAG Tap Controller State Diagram 1 1 Select Capture DR 0 Shift Exit1 DR 0 Pause Exit2 Update 29/37 1 Select Capture IR 0 Shift Exit1 IR 0 Pause Exit2 Update © 2005, GSI Technology ...
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... Instruction codes expressed in binary, MSB on left, LSB on right. 2. Default instruction automatically loaded at power-up and in test-logic-reset state. Rev: 1.08 12/2007 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 Description 30/37 Notes © 2005, GSI Technology ...
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... V DD — 0.4 V – 100 mV V — DD — 100 mV V JTAG Port AC Test Load DQ 50Ω 30pF V /2 DDQ * Distributed Test Jig Capacitance © 2005, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 JTAG Port Timing Diagram tTKH tTKH tTKL tTKL tTH tTS tTH tTS tTKQ tTH tTS Min Max Unit 50 — ns — — — — — ns 32/37 © 2005, GSI Technology ...
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... Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS8662D08/09/18/36E-333/300/250/200/167 BOTTOM VIEW A1 CORNER Ø0. Ø0. Ø0.40~0.60 (165x 1.0 10.0 15±0.05 B 0.20(4x) 33/ 1.0 © 2005, GSI Technology ...
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... Ordering Information—GSI SigmaQuad-II SRAM Org Part Number1 GS8662D08E-333 GS8662D08E-300 GS8662D08E-250 GS8662D08E-200 GS8662D08E-167 GS8662D08E-333I GS8662D08E-300I GS8662D08E-250I GS8662D08E-200I GS8662D08E-167I GS8662D09E-333 GS8662D09E-300 GS8662D09E-250 GS8662D09E-200 GS8662D09E-167 GS8662D09E-333I ...
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... GS8662D36E-333 GS8662D36E-300 GS8662D36E-250 GS8662D36E-200 GS8662D36E-167 GS8662D36E-333I GS8662D36E-300I GS8662D36E-250I GS8662D36E-200I GS8662D36E-167I GS8662D08E-333 GS8662D08GE-300 GS8662D08GE-250 GS8662D08GE-200 GS8662D08GE-167 GS8662D08GE-333I GS8662D08GE-300I GS8662D08GE-250I GS8662D08GE-200I GS8662D08GE-167I GS8662D09GE-333 ...
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... SigmaQuad-II SRAM RoHS-compliant 165-bump BGA 36/37 Speed Package TA3 (MHz) 333 300 250 200 167 333 300 250 200 167 333 300 250 200 167 333 300 250 200 167 © 2005, GSI Technology ...
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... Removed status from ordering information Content • Added 278 MHz (Q) Content • Added V note to Pin Description table REF Content • Updated FLXDrive-II Output Driver Impedance Control section • Removed Preliminary banner due to production status 37/37 Description of changes © 2005, GSI Technology ...