s5935qrc Applied Micro Circuits Corporation (AMCC), s5935qrc Datasheet - Page 72

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s5935qrc

Manufacturer Part Number
s5935qrc
Description
Pci Product
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet

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S5935 – PCI Product
MASTER CONTROL/STATUS REGISTER
(MCSR)
This register provides for overall control of this device.
It is used to enable bus mastering for both data direc-
tions as well as providing a method to perform
software resets.
Figure 31. Bus Master Control/Status Register
72
Register Name
PCI Address
Offset
Power-up value
Attribute
Size32 bits
Reset Controls (R/WC)
D27=Mailbox Flags Reset
D26=Add-on to PCI FIFO
D25=PCI to Add-on FIFO
D24=Add-On Reset
nv operation
address/data
Memory Read Multiple
Read Transfer Control (R/W)
D14=Read Transfer Enable
D13=FIFO Management Scheme
D12=Read vs. Write Priority
nvRAM Access Ctrl
DS1527
Status Flags Reset
Status Flags Reset
Enable = 1
Disable = 0
(PCI memory reads)
31
29
Master Control/Status
3Ch
000000E6h
Read/Write, Read Only, Write
Only
0
27
24 23
Control
16
15
0
14
12
0
The following PCI bus controls are available:
The following PCI interface status flags are provided:
10
8 7
Write Priority over Read
Read Priority over Write
Write Transfer Enable
Write master requests on 4 or more FIFO
words available (full)
Read transfer enable
Read master requests on 4 or more FIFO avail-
able (empty)
Assert reset to Add-On
Reset Add-On to PCI FIFO flags
Reset PCI to Add-On FIFO flags
Reset mailbox empty full status flags
Write external non-volatile memory
PCI to Add-On FIFO FULL
PCI to Add-On FIFO has four or more empty
locations
PCI to Add-On FIFO EMPTY
Add-On to PCI FIFO FULL
Add-On to PCI FIFO has four or more words
loaded
Add-On to PCI FIFO EMPTY
PCI to Add-On Transfer Count = Zero
Add-On to PCI Transfer Count = Zero
6 5
Status
Revision 1.02 – June 27, 2006
FIFO STATUS (RO)
D5=Add-on to PCI FIFO Empty
D4=Add-on to PCI FIFO 4+ Words
D3=Add-on to PCI FIFO Full
D2=PCI to Add-on FIFO Empty
D1=PCI to Add-on FIFO 4+Spaces
D0=PCI to Add-on FIFO Full
AMCC Confidential and Proprietary
D7=Add-on to PCI Transfer Count
D6=PCI to Add-on Transfer Count
Write Transfer Control (R/W)
D10=Write Transfer Enable
D9=FIFO Management Scheme
D8=Write vs Read Priority
0
Bit
Value
(PCI memory writes)
equals zero (R0)
equals zero (R0)
Data Book

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