k6f2016v4e Samsung Semiconductor, Inc., k6f2016v4e Datasheet - Page 8

• Manufacturer Part Number: k6f2016v4e
• Description: 128k X16 Bit Super Low Power And Low Voltage Full Cmos Static Ram
• Manufacturer: Samsung Semiconductor, Inc.

DATA RETENTION WAVE FORM
K6F2016V4E Family
CS or LB/UB controlled
TIMING WAVEFORM OF WRITE CYCLE(3)
Address
CS
UB, LB
WE
Data in
Data out
NOTES (WRITE CYCLE)
1. A wri
2. t
3. t
4. t
V
3.0V
2.2V
V
CS or LB/UB
GND
CC
DR
or LB for single byte operation or simultaneously asserting UB and LB for double byte operation. A write ends at the earliest transi-
tion when CS goes high and WE goes high. The t
CW
AS
WR
is measured from the address valid to the beginning of write.
is measured from the CS going low to the end of write.
is measured from the end of write to the address change. t
t
e occurs during the overlap(t
WP
) of low CS and low WE. A write begins when CS goes low and WE goes low with asserting UB
High-Z
t
SDR
t
AS(3)
WP
(UB, LB Controlled)
is measured from the beginning of write to the end of write.
CS V
WR
Data Retention Mode
CC
- 8 -
is applied in case a write ends with CS or WE going high.
-0.2V
t
t
AW
CW(2)
t
WC
t
BW
t
or LB=UB Vcc-0.2V
WP(1)
t
DW
Data Valid
t
WR(4)
t
DH
High-Z
t
RDR
CMOS SRAM
Revision 1.0
March 2002