S25FL016A0LMAI000 SPANSION [SPANSION], S25FL016A0LMAI000 Datasheet - Page 3

• Manufacturer Part Number: S25FL016A0LMAI000
• Description: 16 Megabit CMOS 3.0 Volt Flash Memory with 50MHz SPI (Serial Peripheral Interface) Bus
• Manufacturer: SPANSION [SPANSION]

Distinctive Characteristics
This document states the current technical specifications regarding the Spansion product(s) described herein. The Preliminary status of this document indicates that product qual-
ification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this document
may be revised by subsequent versions or modifications due to changes in technical specifications.
Architectural Advantages
S25FL016A
16 Megabit CMOS 3.0 Volt Flash Memory
with 50MHz SPI (Serial Peripheral Interface) Bus
Data Sheet (Preliminary)
Single power supply operation
– Full voltage range: 2.7 to 3.6 V read and program operations
Memory Architecture
– Thirty-two sectors with 512 Kb each
Program
– Page Program (up to 256 bytes) in 1.4 ms (typical)
– Program operations are on a page by page basis
Erase
– 0.5 s typical sector erase time
– 10 s typical bulk erase time
Cycling Endurance
– 100,000 cycles per sector typical
Data Retention
– 20 years typical
Device ID
– JEDEC standard two-byte electronic signature
– RES command one-byte electronic signature for backward
Process Technology
– Manufactured on 0.20 µm MirrorBit
compatibility
Publication Number S25FL016A_00
TM
process technology
Revision C0
Performance Characteristics
Memory Protection Features
Software Features
Package Option
– Industry Standard Pinouts
– 16-pin SO package (300 mils)
– 8-pin SO package (208 mils)
– 8-Contact WSON Package (6x8 mm), Pb Free
Speed
– 50 MHz clock rate (maximum)
Power Saving Standby Mode
– Standby Mode 50 µA (max)
– Deep Power Down Mode 1.3 µA (typical)
Memory Protection
– W# pin works in conjunction with Status Register Bits to protect
– Status Register Block Protection bits (BP2, BP1, BP0) in status
– SPI Bus Compatible Serial Interface
specified memory areas
register configure parts of memory as read-only
Issue Date August 28, 2006