SST45LF010-10-4C-SA-DD014 SST [Silicon Storage Technology, Inc], SST45LF010-10-4C-SA-DD014 Datasheet

SST45LF010-10-4C-SA-DD014

Manufacturer Part Number

SST45LF010-10-4C-SA-DD014

Description

1 Mbit Serial Flash

Manufacturer

SST [Silicon Storage Technology, Inc]

Datasheet

1.SST45LF010-10-4C-SA-DD014.pdf (16 pages)

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FEATURES:

• Single 3.0-3.6V Read and Write Operations

• Serial Interface Architecture

• Byte Serial Read with Single Command

• Superior Reliability

• Low Power Consumption

• Sector or Chip-Erase Capability

• Fast Erase and Byte-Program

PRODUCT DESCRIPTION

The SST45LF010 is a 1 Mbit serial flash memory manufac-

tured with SST’s proprietary, high performance CMOS

SuperFlash technology. The 1 Mbit of memory is organized

as 32 sectors of 4096 Bytes. The flash memory uses a 4-

wire serial interface and a chip enable to select and

sequentially access its data. The serial interface consists

of; serial data input (SI), serial data output (SO), serial clock

(SCK), and chip enable (CE#). A write protect (WP#) inhib-

its the entire memory from Write operation and a hardware

reset pin (RST#) resets the device to standby mode.

The SST45LF010 device is offered in both 8-lead SOIC

and 8-contact WSON packages. See Figure 2 for the pin

assignments.

Device Operation

The SST45LF010 uses bus cycles of 8 bits each for com-

mands, data, and addresses to execute operations. The

operation instructions are listed in Table 3.

All instructions are synchronized off a high to low transition

of CE#. The first low to high transition on SCK will initiate

the instruction sequence. Inputs will be accepted on the ris-

ing edge of SCK starting with the most significant bit. Any

low to high transition on CE# before the input instruction

completes will terminate any instruction in progress and

return the device to the standby mode.

S71128-04-000 3/03

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

– Active Current: 10 mA (typical)

– Standby Current: 10 µA (typical)

– Uniform 4 KByte sectors

– Chip-Erase Time: 70 ms (typical)

– Sector-Erase Time: 18 ms (typical)

– Byte-Program Time: 14 µs (typical)

372

SST45LF0101Mb 4-wire Serial Interface flash memory

1 Mbit Serial Flash

SST45LF010

The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc.

• Automatic Write Timing

• End-of-Write Detection

• 10 MHz Max Clock Frequency

• Hardware Reset Pin (RST#)

• CMOS I/O Compatibility

• Hardware Data Protection (WP#)

• Packages Available

Read

The Read operation outputs the data in order from the ini-

tial accessed address. While SCK is input, the address will

be incremented automatically until end (top) of the address

space (1FFFFH), then the internal address pointer auto-

matically increments to beginning (bottom) of the address

space (00000H), and data out stream will continue. The

read data stream is continuous through all addresses until

terminated by a low to high transition on CE#.

Sector/Chip-Erase Operation

The Sector-Erase operation clears all bits in the selected

sector to FFH. The Chip-Erase instruction clears all bits in

the device to FFH.

Byte-Program Operation

The Byte-Program operation programs the bits in the

selected byte to the desired data. The selected byte must

be in the erased state (FFH) when initiating a Program

operation. The data is input from bit 7 to bit 0 in order.

Software Status Operation

The Status operation determines if an Erase or Program

operation is in progress. If bit 0 is at a “0” an Erase or Pro-

gram operation is in progress, the device is busy. If bit 0 is

at a “1” the device is ready for any valid operation. The sta-

tus read is continuous with ongoing clock cycles until termi-

nated by a low to high transition on CE#.

– Internal V

– Software Status

– Resets the device to Standby Mode

– Protects and unprotects the device from Write

– 8-lead SOIC (4.9mm x 6mm)

– 8-contact WSON

operation

Generation

These specifications are subject to change without notice.

Data Sheet

Related parts for SST45LF010-10-4C-SA-DD014

SST45LF010-10-4C-SA-DD014 Summary of contents

Page 1

... WSON packages. See Figure 2 for the pin assignments. Device Operation The SST45LF010 uses bus cycles of 8 bits each for com- mands, data, and addresses to execute operations. The operation instructions are listed in Table 3. All instructions are synchronized off a high to low transition of CE# ...

Page 2

... Silicon Storage Technology, Inc. Reduced-Function Option (SST45LF010-10-4C-SA-DD014) The SST45LF010-10-4C-SA-DD014 is a reduced-function option of the SST45LF010-10-4C-xA. For these devices, SST only tests and guarantees func- tionality when separate serial input and serial output data lines are used ...

Page 3

... Mbit Serial Flash SST45LF010 UNCTIONAL LOCK IAGRAM Address Buffers and Latches ©2003 Silicon Storage Technology, Inc Decoder Control Logic Serial Interface CE# SCK SI SO WP# 3 Data Sheet SuperFlash Memory Y - Decoder I/O Buffers and Data Latches 372 ILL B1.4 RST# S71128-04-000 3/03 372 ...

Page 4

... To provide power supply (3.0-3.6V Ground SS ©2003 Silicon Storage Technology, Inc. 8 RST SCK 4 372 ILL F01.6 8- CONTACT 4 1 Mbit Serial Flash SST45LF010 RST Top View 372 ILL F01a.2 WSON T2.5 372 S71128-04-000 3/03 372 ...

Page 5

... Chip-Erase 60H Hi-Z X Byte-Program 10H Hi Status Reg. 9FH X X Read-ID 90H Hi-Z 00H 1. For SST45LF010 can One bus cycle is eight clock periods 3. Operation: S =Serial In, S =Serial Out IN OUT Dummy cycles (can are used to determine sector address, A ...

Page 6

... WP#, RST#=GND =100 µ -0 =-100 µ Mbit Serial Flash SST45LF010 +0.5V DD +2. EST = f=10 MHz Max ILT IHT , V =V Max Max Max IHC ...

Page 7

... Mbit Serial Flash SST45LF010 TABLE 6: C APACITANCE (Ta = 25°C, f=1 Mhz, other pins open) Parameter Description 1 C Output Pin Capacitance OUT 1 C Input Capacitance IN 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. ...

Page 8

... ILT DD ) and V (0 Input rise and fall times (10 EFERENCE AVEFORMS TO TESTER 372 ILL F03 Mbit Serial Flash SST45LF010 V OT OUTPUT 372 ILL F02.2 ) for a logic “0”. Measurement reference points 90%) are <5 ns. Note Test IT INPUT OUTPUT V ...

Page 9

... Mbit Serial Flash SST45LF010 WP# CE# T CES SCK T DS DATA VALID SI HIGH-Z SO FIGURE ERIAL INPUT IMING WP# CE# T SCKH T SCKL SCK T CLZ SO SI FIGURE ERIAL UTPUT IMING ©2003 Silicon Storage Technology, Inc. T SCKH T SCKL IAGRAM NACTIVE ERIAL ...

Page 10

... ADD. ADD. X HIGH IMPEDANCE D IAGRAM HIGH IMPEDANCE D IAGRAM 10 1 Mbit Serial Flash SST45LF010 T WPH SELF-TIMED SECTOR- ERASE CYCLE D0H X 372 ILL F06.7 T WPH T SCE SELF-TIMED CHIP- ERASE CYCLE D0H X 372 ILL F07.10 ...

Page 11

Page 12

... Data Sheet WP# CE SCK 90H SI SO Note: 1. SST Manufacturer BFH is read with SST45LF010 Device ID = 42H is read with FIGURE 11 EAD IMING WP# CE SCK SI HIGH IMPEDANCE SO FIGURE 12 OFTWARE TATUS ©2003 Silicon Storage Technology, Inc. ...

Page 13

... Mbit Serial Flash SST45LF010 CE# SCK RESET# HIGH IMPEDANCE SO SI FIGURE 13 ESET IMING IAGRAM V DD RESET# CE# FIGURE 14 OWER N ESET T WPS WP# CE# T CES SCK FIGURE 15 RITE ROTECT IMING ©2003 Silicon Storage Technology, Inc. ... ... ... ( NACTIVE LOCK ...

Page 14

... Package Type S = SOIC Q = WSON Temperature Range C = Commercial = 0°C to +70°C Minimum Endurance 4 = 10,000 cycles Operating Frequency MHz Device Density 010 = 1 Mbit Voltage L = 3.0-3.6V 1. For details, see “Reduced-Function Option (SST45LF010-10-4C-SA-DD014)” on page 2. SST45LF010-10-4C- Mbit Serial Flash SST45LF010 1 S71128-04-000 3/03 372 ...

Page 15

... Mbit Serial Flash SST45LF010 PACKAGING DIAGRAMS Pin #1 Identifier Top View 5.0 4.8 4.00 3.80 6.20 5.80 Note: 1. Complies with JEDEC publication 95 MS-012 AA dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0 Maximum allowable mold flash is 0. the package ends and 0.25 mm between leads. ...

Page 16

... Silicon Storage Technology, Inc. Side View 0.25 0.19 5.00 BSC 0.076 0.05 Max 0.8 0 (WSON) UTLINE O LEAD Description Current parameter in Table 5 on page 6 DD www.SuperFlash.com or www.sst.com 16 1 Mbit Serial Flash SST45LF010 Bottom View Pin #1 1.27 BSC 4.00 3.40 0.48 0.35 0.75 0.50 Cross Section 0.8 0.7 8-wson-5x6-QA-5 Date May 2002 Mar 2003 S71128-04-000 3/03 372 ...

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