vsc055xkm-01 Maxim Integrated Products, Inc., vsc055xkm-01 Datasheet

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vsc055xkm-01

Manufacturer Part Number
vsc055xkm-01
Description
Enhanced I?c Backplane Controller
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
To order the VSC055-01 device, see
G
The VSC055-01 device is an I/O-intensive peripheral device that is intended to be part of a cost-effective Fibre
Channel Arbitrated Loop (FC-AL), Small Computer System Interface (SCSI), Serial Attached SCSI (SAS), or
Serial ATA (SATA) enclosure management solution. The device contains an address-programmable two-wire serial
interface, a block of control and status registers, I/O port control logic, specialized port bypass control logic, and a
clock-generation block.
Along with an external crystal, the device can be configured to support up to 64 bits of general-purpose I/O; or 16 bits
of general-purpose I/O, 32 bits of port bypass control (16 pairs supporting 16 drives), eight fan speed monitoring
inputs, and eight pulse-width modulated general-purpose control outputs.
The VSC055-01 supports various combinations of individual port bypass circuit (PBC), clock recovery unit (CRU),
and signal detect unit (SDU) functions, as well as integrated solutions. The control register portion of the device
allows the user to individually program each I/O pin as an input, an output, or an open-drain or open-source output.
Revision 4.1
January 2008
F
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EATURES
ENERAL
Up to 64 bits of user-definable, bidirectional
general-purpose inputs and outputs
Integrated port bypass, clock recovery and signal
detect support for up to 16 drives
Eight programmable fan speed monitoring inputs
Eight programmable pulse-width modulated fan
control outputs
Up to 32 programmable input-to-output bypass pairs
Two clock input ranges: 8.0 MHz to 12.5 MHz
(external crystal or external clock source) and
32.0 MHz to 75.0 MHz (external clock source)
Selectable direct LED drive flashing capability
Pin-programmable addressing for up to 16 devices
on a single serial bus
5-V tolerant high current I/O, Slave mode two-wire
serial interface and interrupt output
Ten programmable LED pulse train circuits
One 24-bit general-purpose timer (supports a
timeout greater than four seconds with a 12.5 MHz
core clock)
D
ESCRIPTION
Enhanced Two-Wire Serial Backplane Controller
“Ordering Information,”
A
page 133.
PPLICATIONS
Up to 16 subaddressed Master mode two-wire serial
interface ports
Enhanced fan speed monitor input filters
20% of package pins are power and ground for
excellent noise immunity and long-term reliability
Enterprise storage environments
Storage Area Network (SAN) appliances
Network Attached Storage (NAS) systems
Fabric Attached Storage (FAS) systems
Rack-mounted servers with RAID
JBOD arrays
Disk-based backup storage
Near-line storage replacement systems
Fixed-content storage systems
VSC055-01 Data Sheet
Maxim Integrated Products
1 of 133

Related parts for vsc055xkm-01

vsc055xkm-01 Summary of contents

Page 1

Revision 4.1 January 2008 Enhanced Two-Wire Serial Backplane Controller F EATURES • bits of user-definable, bidirectional general-purpose inputs and outputs • Integrated port bypass, clock recovery and signal detect support for drives • Eight ...

Page 2

Additional control features include: selectable flash rates for direct LED drive, input edge detection for interrupt generation, input to output bypass capability, fan speed monitoring control, and pulse-width modulated output control. Support for sub-addressing additional two-wire serial slave devices using ...

Page 3

VSC055-01 Data Sheet T A YPICAL PPLICATIONS FC-AL Drive Enclosure Configuration Basic port bypass configuration ● Support for up to 128 drives: Backplane Controller supports up to two sets of CRU/SDU functions and eight ● drives, and 16 Backplane Controllers ...

Page 4

General-Purpose I/O Configuration Controlled by general-purpose microcontroller with two-wire serial interface ● Support for up to 1024 I/O lines: Backplane controller supports I/O lines and 16 backplane controllers ● can be simultaneously attached to the serial bus ...

Page 5

VSC055-01 Data Sheet Contents General Description..................................................................................................... 1 Features ........................................................................................................................ 1 Applications ................................................................................................................. 1 Typical Applications .................................................................................................... 3 Revision History........................................................................................................... 9 1 Introduction ....................................................................................................... 10 2 Functional Descriptions ................................................................................... 11 2.1 Two-Wire Serial Interface ............................................................................................................11 2.2 Control Registers .........................................................................................................................11 2.3 I/O ...

Page 6

Port Bypass Control 7 (PBC7) ...............................................................................37 3.2.25 28h: Port Bypass Control 8 (PBC8) ...............................................................................38 3.2.26 29h: Port Bypass Control 9 (PBC9) ...............................................................................39 3.2.27 2Ah: Port Bypass Control 10 (PBC10) ...........................................................................40 3.2.28 2Bh: Port Bypass Control 11 (PBC11) ...........................................................................41 ...

Page 7

VSC055-01 Data Sheet 3.2.68 7Bh: Pulse Train Control 51 (PTC51) ............................................................................73 3.2.69 7Ch: Pulse Train Control 60 (PTC60) ............................................................................74 3.2.70 7Dh: Pulse Train Control 61 (PTC61) ............................................................................75 3.2.71 7Eh: Pulse Train Control 70 (PTC70) ............................................................................76 3.2.72 7Fh: Pulse Train Control ...

Page 8

Oscillator and Clock Input ............................................................................................118 4.1.9 Oscillator Output ..........................................................................................................118 4.2 AC Characteristics .....................................................................................................................119 4.2.1 External Clock Timing ..................................................................................................119 4.2.2 Two-Wire Serial Interface Timing ................................................................................120 4.3 Operating Conditions .................................................................................................................121 4.4 Maximum Ratings ......................................................................................................................121 4.5 Two-Wire Serial Interface Operation ..........................................................................................122 4.6 ...

Page 9

VSC055-01 Data Sheet R H EVISION ISTORY This section describes changes that have been implemented in this document. The changes are listed by revision, starting with the most recent publication. Revision 4.1 Revision 4.1 of this data sheet was published ...

Page 10

Introduction This data sheet provides reference information for the Maxim Enhanced Two-Wire Serial Backplane Controller, VSC055-01 intended for system designers and software and firmware developers who are using this device to support enclosure management functions or other ...

Page 11

VSC055-01 Data Sheet 2 Functional Descriptions The VSC055-01 device is composed of five major functional blocks: a Slave mode two-wire serial interface ● a block of control registers ● general-purpose I/O and specialized port bypass control logic ● a clock ...

Page 12

The VSC055-01 device contains 164 registers to support all required functions. In ...

Page 13

VSC055-01 Data Sheet 2.3 I/O Logic Each general-purpose 5-V tolerant I/O pin is controlled by a set of registers in the Control register block. The I/O supports a high current drive output buffer that can be configured as a totem ...

Page 14

Table 1. CKSEL Settings (continued) CKSEL2 CKSEL1 VDD VSS VDD VDD VDD VDD The VSC055-01 device can operate at frequencies other than those listed in the above table and maintain accurate fan speed and LED control frequencies, as well as ...

Page 15

VSC055-01 Data Sheet 3 Registers This section contains descriptions for the device-specific control registers. All register locations are fixed within the device and are mapped for easy access, as well as for future enhancements. 3.1 Control Registers The control register ...

Page 16

Table 2. Register Map (continued) Data Memory Address Access 29h R/W 2Ah R/W 2Bh R/W 2Ch R/W 2Dh R/W 2Eh R/W 2Fh R/W 30h R/W 31h R/W 32h R 34h R/W 35h R/W 36h R 38h R/W 39h R/W 3Ah ...

Page 17

VSC055-01 Data Sheet Table 2. Register Map (continued) Data Memory Address Access 79h R/W 7Ah R/W 7Bh R/W 7Ch R/W 7Dh R/W 7Eh R/W 7Fh R/W 80h R/W 81h R/W 82h R/W 83h R/W 84h R/W 85h R/W 86h R/W ...

Page 18

Table 2. Register Map (continued) Data Memory Address Access A5h R/W A6h R/W A7h R/W B0h R/W B1h R/W B2h R/W B3h R/W B4h R/W B5h R/W B6h R/W B7h R/W C0h R/W C1h R/W C2h R/W C3h R/W C4h ...

Page 19

VSC055-01 Data Sheet Table 2. Register Map (continued) Data Memory Address Access E9h R/W EAh R/W EBh R/W ECh R/W EDh R EEh R F0h R/W F1h R/W F2h R/W F3h R/W F4h R/W F5h R/W F6h R/W F7h R/W ...

Page 20

Table 3. Address Map (continued) 11b reserved reserved PTC11 PTC31 PTC51 PTC71 BCP03 BCP07 reserved reserved BCP13 BCP17 PWMC3 PWMC7 BCP23 BCP27 reserved BCP33 BCP37 reserved BCP43 BCP47 reserved GPTE BCP53 BCP57 reserved BCP63 BCP67 MIC reserved BCP73 BCP77 reserved ...

Page 21

VSC055-01 Data Sheet 3.2 Control Register Definitions The control register definitions provides a bit-level description of all register bits, including power on and default values. The terms set and assert refer to bits that are programmed to a binary 1. ...

Page 22

General-Purpose I/O Port 1 Data (GPD1) The following table shows the bit assignments for the General-Purpose I/O Port 1 Data register. Register Name: GPD1 Address: 01h Reset Value: XXXX_XXXXb Bit Bit Label 7:0 GPD1.7-0 3.2.3 02h: General-Purpose I/O ...

Page 23

VSC055-01 Data Sheet 3.2.4 03h: General-Purpose I/O Port 3 Data (GPD3) The following table shows the bit assignments for the General-Purpose I/O Port 3 Data register. Control of the individual I/O pins in this register can be overridden by the ...

Page 24

General-Purpose I/O Port 5 Data (GPD5) The following table shows the bit assignments for the General-Purpose I/O Port 5 Data register. Control of the individual I/O pins in this register can be overridden by the PBC8, PBC9, PBC10, ...

Page 25

VSC055-01 Data Sheet 3.2.8 07h: General-Purpose I/O Port 7 Data (GPD7) The following table shows the bit assignments for the General-Purpose I/O Port 7 Data register. Register Name: GPD7 Address: 07h Reset Value: XXXX_XXXXb Bit Bit Label 7:0 GPD7.7-0 3.2.9 ...

Page 26

I/O Port 1 Data Direction (DDP1) The following table shows the bit assignments for the I/O Port 1 Data Direction register. Register Name: DDP1 Address: 11h Reset Value: 1111_1111b Bit Bit Label 7:0 DDP1.7-0 3.2.11 12h: I/O Port ...

Page 27

VSC055-01 Data Sheet 3.2.12 13h: I/O Port 3 Data Direction (DDP3) The following table shows the bit assignments for the I/O Port 3 Data Direction register. Control of the individual I/O pins in this register can be overridden by the ...

Page 28

I/O Port 5 Data Direction (DDP5) The following table shows the bit assignments for the I/O Port 5 Data Direction register. Control of the individual I/O pins in this register can be overridden by the PBC8, PBC9, PBC10, ...

Page 29

VSC055-01 Data Sheet 3.2.16 17h: I/O Port 7 Data Direction (DDP7) The following table shows the bit assignments for the I/O Port 7 Data Direction register. Register Name: DDP7 Address: 17h Reset Value: 1111_1111b Bit Bit Label 7:0 DDP7.7-0 Access ...

Page 30

Port Bypass Control 0 (PBC0) The following table shows the bit assignments for the Port Bypass Control 0 register. This register affects the P3.1 and P3.0 pins. Register Name: PBC0 Address: 20h Reset Value: 00XX_XX1Xb Bit Bit Label ...

Page 31

VSC055-01 Data Sheet 3.2.18 21h: Port Bypass Control 1 (PBC1) The following table shows the bit assignments for the Port Bypass Control 1 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 32

Port Bypass Control 2 (PBC2) The following table shows the bit assignments for the Port Bypass Control 2 register. This register functions the same as the Port Bypass Control 0 register except it affects the P3.5 and P3.4 ...

Page 33

VSC055-01 Data Sheet 3.2.20 23h: Port Bypass Control 3 (PBC3) The following table shows the bit assignments for the Port Bypass Control 3 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 34

Port Bypass Control 4 (PBC4) The following table shows the bit assignments for the Port Bypass Control 4 register. This register functions the same as the Port Bypass Control 0 register except it affects the P4.1 and P4.0 ...

Page 35

VSC055-01 Data Sheet 3.2.22 25h: Port Bypass Control 5 (PBC5) The following table shows the bit assignments for the Port Bypass Control 5 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 36

Port Bypass Control 6 (PBC6) The following table shows the bit assignments for the Port Bypass Control 6 register. This register functions the same as the Port Bypass Control 0 register except it affects the P4.5 and P4.4 ...

Page 37

VSC055-01 Data Sheet 3.2.24 27h: Port Bypass Control 7 (PBC7) The following table shows the bit assignments for the Port Bypass Control 7 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 38

Port Bypass Control 8 (PBC8) The following table shows the bit assignments for the Port Bypass Control 8 register. This register functions the same as the Port Bypass Control 0 register except it affects the P5.1 and P5.0 ...

Page 39

VSC055-01 Data Sheet 3.2.26 29h: Port Bypass Control 9 (PBC9) The following table shows the bit assignments for the Port Bypass Control 9 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 40

Port Bypass Control 10 (PBC10) The following table shows the bit assignments for the Port Bypass Control 10 register. This register functions the same as the Port Bypass Control 0 register except it affects the P5.5 and P5.4 ...

Page 41

VSC055-01 Data Sheet 3.2.28 2Bh: Port Bypass Control 11 (PBC11) The following table shows the bit assignments for the Port Bypass Control 11 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 42

Port Bypass Control 12 (PBC12) The following table shows the bit assignments for the Port Bypass Control 12 register. This register functions the same as the Port Bypass Control 0 register except it affects the P6.1 and P6.0 ...

Page 43

VSC055-01 Data Sheet 3.2.30 2Dh: Port Bypass Control 13 (PBC13) The following table shows the bit assignments for the Port Bypass Control 13 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 44

Port Bypass Control 14 (PBC14) The following table shows the bit assignments for the Port Bypass Control 14 register. This register functions the same as the Port Bypass Control 0 register except it affects the P6.5 and P6.4 ...

Page 45

VSC055-01 Data Sheet 3.2.32 2Fh: Port Bypass Control 15 (PBC15) The following table shows the bit assignments for the Port Bypass Control 15 register. This register functions the same as the Port Bypass Control 0 register except it affects the ...

Page 46

Fan Speed Control 0 (FSC0) The following table shows the bit assignments for the Fan Speed Control 0 register. This register affects the P2.0 pin. Register Name: FSC0 Address: 30h Reset Value: 00XX_XX00b Bit Bit Label 7 FSCEN ...

Page 47

VSC055-01 Data Sheet 3.2.34 31h: Fan Speed Count Overflow 0 (FSCO0) The following table shows the bit assignments for the Fan Speed Count Overflow 0 register. This register affects the P2.0 pin. Register Name: FSCO0 Address: 31h Reset Value: 0000_0000b ...

Page 48

Fan Speed Control 1 (FSC1) The following table shows the bit assignments for the Fan Speed Control 1 register. This register functions same the Fan Speed Control 0 register except it affects the P2.1 pin. Register Name: FSC1 ...

Page 49

VSC055-01 Data Sheet 3.2.37 35h: Fan Speed Count Overflow 1 (FSCO1) The following table shows the bit assignments for the Fan Speed Count Overflow 1 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 50

Fan Speed Control 2 (FSC2) The following table shows the bit assignments for the Fan Speed Control 2 register. This register functions same the Fan Speed Control 0 register except it affects the P2.2 pin. Register Name: FSC2 ...

Page 51

VSC055-01 Data Sheet 3.2.40 39h: Fan Speed Count Overflow 2 (FSCO2) The following table shows the bit assignments for the Fan Speed Count Overflow 2 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 52

Fan Speed Control 3 (FSC3) The following table shows the bit assignments for the Fan Speed Control 3 register. This register functions same the Fan Speed Control 0 register except it affects the P2.3 pin. Register Name: FSC3 ...

Page 53

VSC055-01 Data Sheet 3.2.43 3Dh: Fan Speed Count Overflow 3 (FSCO3) The following table shows the bit assignments for the Fan Speed Count Overflow 3 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 54

Fan Speed Control 4 (FSC4) The following table shows the bit assignments for the Fan Speed Control 4 register. This register functions same the Fan Speed Control 0 register except it affects the P2.4 pin. Register Name: FSC4 ...

Page 55

VSC055-01 Data Sheet 3.2.46 41h: Fan Speed Count Overflow 4 (FSCO4) The following table shows the bit assignments for the Fan Speed Count Overflow 4 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 56

Fan Speed Control 5 (FSC5) The following table shows the bit assignments for the Fan Speed Control 5 register. This register functions same the Fan Speed Control 0 register, except it affects the P2.5 pin. Register Name: FSC5 ...

Page 57

VSC055-01 Data Sheet 3.2.49 45h: Fan Speed Count Overflow 5 (FSCO5) The following table shows the bit assignments for the Fan Speed Count Overflow 5 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 58

Fan Speed Control 6 (FSC6) The following table shows the bit assignments for the Fan Speed Control 6 register. This register functions same the Fan Speed Control 0 register except it affects the P2.6 pin. Register Name: FSC6 ...

Page 59

VSC055-01 Data Sheet 3.2.52 49h: Fan Speed Count Overflow 6 (FSCO6) The following table shows the bit assignments for the Fan Speed Count Overflow 6 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 60

Fan Speed Control 7 (FSC7) The following table shows the bit assignments for the Fan Speed Control 7 register. This register functions same the Fan Speed Control 0 register except it affects the P2.7 pin. Register Name: FSC7 ...

Page 61

VSC055-01 Data Sheet 3.2.55 4Dh: Fan Speed Count Overflow 7 (FSCO7) The following table shows the bit assignments for the Fan Speed Count Overflow 7 register. This register functions same the Fan Speed Count Overflow 0 register except it affects ...

Page 62

Pulse Train Control 00 (PTC00) This register, along with the PTC01 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to derive a specific ...

Page 63

VSC055-01 Data Sheet 3.2.58 71h: Pulse Train Control 01 (PTC01) This register, along with the PTC00 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 64

Pulse Train Control 10 (PTC10) This register, along with the PTC11 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to derive a specific ...

Page 65

VSC055-01 Data Sheet 3.2.60 73h: Pulse Train Control 11 (PTC11) This register, along with the PTC10 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 66

Pulse Train Control 20 (PTC20) This register, along with the PTC21 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to derive a specific ...

Page 67

VSC055-01 Data Sheet 3.2.62 75h: Pulse Train Control 21 (PTC21) This register, along with the PTC20 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 68

Pulse Train Control 30 (PTC30) This register, along with the PTC31 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to derive a specific ...

Page 69

VSC055-01 Data Sheet 3.2.64 77h: Pulse Train Control 31 (PTC31) This register, along with the PTC30 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 70

Pulse Train Control 40 (PTC40) This register, along with the PTC41 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length and the on/off time to derive a specific ...

Page 71

VSC055-01 Data Sheet 3.2.66 79h: Pulse Train Control 41 (PTC41) This register, along with the PTC40 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 72

Pulse Train Control 50 (PTC50) This register, along with the PTC51 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to derive a specific ...

Page 73

VSC055-01 Data Sheet 3.2.68 7Bh: Pulse Train Control 51 (PTC51) This register, along with the PTC50 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 74

Pulse Train Control 60 (PTC60) This register, along with the PTC61 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length and the on/off time to derive a specific ...

Page 75

VSC055-01 Data Sheet 3.2.70 7Dh: Pulse Train Control 61 (PTC61) This register, along with the PTC60 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length and the on/off time to ...

Page 76

Pulse Train Control 70 (PTC70) This register, along with the PTC71 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to derive a specific ...

Page 77

VSC055-01 Data Sheet 3.2.72 7Fh: Pulse Train Control 71 (PTC71) This register, along with the PTC70 register, provides a user-programmable LED flashing pulse train. The user can adjust the pulse duration, the pulse train length, and the on/off time to ...

Page 78

Bit Control Port 0 (BCP00-BCP07) These eight registers provide individual bit control for the Port 0 I/O pins. All register bits are identical from a control and status perspective, with the only difference being the individual I/O pin ...

Page 79

VSC055-01 Data Sheet Bit Bit Label 4:2 FS2 GPD Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an output, ...

Page 80

Table 4 shows the available output drive combinations. Table 4. Bypass Driving Modes BYP0 BYP1 Bypass Driving Mode 0 0 Normal GPIO operation, control is defined by the FS2-0, DD, and GPD bits 0 1 Open-drain drive, active driver to ...

Page 81

VSC055-01 Data Sheet Table 5. LED Options (continued) PTE FS2 FS1 Table 6 shows the available input edge combinations. Table 6. Input Edge Combinations FS2 FS1 ...

Page 82

Pulse Train Control 81 (PTC81) This register, along with the PTC80 register, provides a user-programmable LED flashing pulse train that defines the 0.33 Hz flash rate (selectable in the bit control registers) at power on. The user can ...

Page 83

VSC055-01 Data Sheet 3.2.76 8Ch: Pulse Train Control 90 (PTC90) This register, along with the PTC91 register, provides a user-programmable LED flashing pulse train that defines the 0.25 Hz flash rate (selectable in the bit control registers) at power on. ...

Page 84

Pulse Train Control 91 (PTC91) This register, along with the PTC90 register, provides a user-programmable LED flashing pulse train that defines the 0.25 Hz flash rate (selectable in the bit control registers) at power on. The user can ...

Page 85

VSC055-01 Data Sheet 3.2.78 90h-97h: Bit Control Port 1 (BCP10-BCP17) These eight registers function the same as the Bit Control Port 0 register except they provide individual bit control for the Port 1 I/O pins. All register bits are identical ...

Page 86

Bit Bit Label 4:2 FS2 GPD Revision 4.1 January 2008 Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an ...

Page 87

VSC055-01 Data Sheet 3.2.79 98h-9Fh: Pulse-Width Modulation Control (PWMC0-PWMC7) These eight registers provide a pulse-width modulated output that can optionally be made available on each of the Port 1 I/O pins. Configurations for these I/O pins that may have been ...

Page 88

Table 7. Pulse-Width Percentages (continued) PWP4 PWP3 PWP2 ...

Page 89

VSC055-01 Data Sheet 3.2.80 A0h-A7h: Bit Control Port 2 (BCP20-BCP27) These eight registers function the same as the Bit Control Port 0 registers except they provide individual bit control for the Port 2 I/O pins. All register bits are identical ...

Page 90

Bit Bit Label 4:2 FS2 GPD Revision 4.1 January 2008 Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an ...

Page 91

VSC055-01 Data Sheet 3.2.81 B0h-B7h: Bit Control Port 3 (BCP30-BCP37) These eight registers function the same as the Bit Control Port 0 registers except they provide individual bit control for the Port 3 I/O pins. All register bits are identical ...

Page 92

Bit Bit Label 4:2 FS2 GPD Revision 4.1 January 2008 Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an ...

Page 93

VSC055-01 Data Sheet 3.2.82 C0h-C7h: Bit Control Port 4 (BCP40-BCP47) These eight registers function the same as the Bit Control Port 0 registers except they provide individual bit control for the Port 4 I/O pins. All register bits are identical ...

Page 94

Bit Bit Label 4:2 FS2 GPD Revision 4.1 January 2008 Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an ...

Page 95

VSC055-01 Data Sheet 3.2.83 CCh: General-Purpose Timer Count 0 (GPTC0) The following table shows the bit assignments for the General-Purpose Timer Count 0 register. Register Name: GPTC0 Address: CCh Reset Value: 0000_0000b Bit Bit Label 7:0 TC7-0 3.2.84 CDh: General-Purpose ...

Page 96

CEh: General-Purpose Timer Count 2 (GPTC2) The following table shows the bit assignments for the General-Purpose Timer Count 2 register. Register Name: GPTC2 Address: CEh Reset Value: 0000_0000b Bit Bit Label 7:0 TC23-16 3.2.86 CFh: General-Purpose Timer Enable (GPTE) ...

Page 97

VSC055-01 Data Sheet 3.2.87 D0h-D7h: Bit Control Port 5 (BCP50-BCP57) These eight registers function the same as the eight Bit Control Port 0 registers except that they relate to the Port 5 I/O pins. In addition, the control of the ...

Page 98

Bit Bit Label 4:2 FS2 GPD Revision 4.1 January 2008 Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an ...

Page 99

VSC055-01 Data Sheet 3.2.88 E0h-E7h: Bit Control Port 6 (BCP60-BCP67) These eight registers function the same as the eight Bit Control Port 0 registers except that they relate to the Port 6 I/O pins. In addition, the control of the ...

Page 100

Bit Bit Label 4:2 FS2 GPD Revision 4.1 January 2008 Access Description R/W Function Select These three bits, along with the PTE, DD, and GPD bits, determine the function of each I/O pin. When configured as an ...

Page 101

VSC055-01 Data Sheet 3.2.89 E8h: Master Interface Clock Divider (MICD) The following seven registers comprise the Master Interface function. This function provides the ability to re-configure 32 of the I/O pins on a pair-by-pair basis as a Master mode two-wire ...

Page 102

E9h: Master Interface Port Select (MIPS) The following table shows the bit assignments for the Master Interface Port Select register. Register Name: MIPS Address: E9h Reset Value: 0X00_0000b Bit Bit Label 7 MIPE 6:5 RES 4:2 PS2-0 1:0 BS1-0 ...

Page 103

VSC055-01 Data Sheet 3.2.92 EBh: Master Interface Command (MIC) The following table shows the bit assignments for the Master Interface Command register. Register Name: MIC Address: EBh Reset Value: 1100_0000b Bit Bit Label 7 SDAI 6 SDAO 5 SRST 4 ...

Page 104

Bit Bit Label 1 STO 0 STA Operating Notes for the Master Serial Interface Encoded Two-Wire Serial Commands 52h - Read byte with stop, no acknowledge (used at the end of read telegrams) 54h - Read byte with acknowledge (used ...

Page 105

VSC055-01 Data Sheet (repeat steps 5-8 if there are multiple register address bytes or data bytes) Send data written to slave device register with a stop: 9) <data byte> 10) Write 5Ah to the MIC register (command) 11) Poll the ...

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Read a byte: (if only one byte read, skip to "Read last byte") 13) write 54h to the MIC register (command) 14) Poll the MIS register (status) until bit 15) Read data is now ...

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VSC055-01 Data Sheet 3.2.93 ECh: Master Interface Low-Level Control (MILC) The following table shows the bit assignments for the Master Interface Low-Level Control register. Register Name: MILC Address: ECh Reset Value: XXXX_XXX1b Bit Bit Label 7:1 RES 0 SCLO 3.2.94 ...

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EEh: Master Interface Read Data (MIRD) This register allows a sequential read operation of the MIC (command), MILC (low-level control, delay to allow transfer to complete), MIS (status), and MIRD (read data) registers by an external microcontroller to form ...

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VSC055-01 Data Sheet Bit Bit Label 6:5 BYP1-0 4:2 FS2 Access Description R/W Bypass Select These two bits determine the bypass function of the odd-numbered I/O pins P0.7, P0.5, P0.3, and P0.1. Setting either or both of these ...

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Bit Bit Label 0 GPD 3.2.97 F8h: Backplane Controller Interrupt Status (BCIS) The following table shows the bit assignments for the Backplane Controller Interrupt Status register. Register Name: BCIS Address: F8h Reset Value: 0000_0000b Bit Bit Label 7:0 IA7-0 Revision ...

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VSC055-01 Data Sheet 3.2.98 FCh: Backplane Controller Test (BCT) The following table shows the bit assignments for the Backplane Controller Test register. Register Name: BCT Address: FCh Reset Value: 0XXX_X000b Bit Bit Label 7 SRST 6:3 RES 2 FSB 1 ...

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Bit Bit Label 6 COD 5:4 PDS1-0 3:0 SP3-0 Revision 4.1 January 2008 Access Description R/W CKOUT Output Disable This bit enables or disables the CKOUT pin. If this bit is set, the CKOUT pin stops toggling with the output ...

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VSC055-01 Data Sheet 3.2.100 FEh: Clock Divider Control (CDC) The following table shows the bit assignments for the Clock Divider Control register. Register Name: CDC Address: FEh Reset Value: 0000_0000b Bit Bit Label 7:0 ICD The following table lists the ...

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Table 9. Clock Divider (continued) CKSEL2 CKSEL1 VDD VDD VDD VDD VDD VDD VDD VDD 3.2.101 FFh: Backplane Controller Version (VER) The following table shows the bit assignments for the Backplane Controller Version register. Register Name: VER Address: FFh Reset ...

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VSC055-01 Data Sheet 4 Electrical Specifications This section provides the DC characteristics, AC characteristics, recommended operating conditions, and stress ratings for the VSC055-01 device. The DC and AC specifications listed in this section are guaranteed over the recommended operating conditions ...

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Two-Wire Serial Interface The following table lists the DC specifications for the two-wire serial interfaces for the SDA pin. Table 11. Two-Wire Serial Interface, SDA Parameter Output LOW voltage Input HIGH voltage Input LOW voltage Schmitt threshold, positive Schmitt ...

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VSC055-01 Data Sheet 4.1.4 Interrupt Output The following table lists the DC specifications for the interrupt output, INT#. Table 14. Interrupt Output Parameter Output LOW voltage 4.1.5 Test and Synchronization Clock Control Inputs The following table lists the DC specifications ...

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Clock Output The following table lists the DC specifications for the clock output, CKOUT. Table 17. Clock Output Parameter Output HIGH voltage Output LOW voltage 4.1.8 Oscillator and Clock Input The following table lists the DC specifications for the ...

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VSC055-01 Data Sheet 4.2 AC Characteristics The following section shows the AC specifications for the VSC055-01 device. 4.2.1 External Clock Timing The following section contains the external clock cycle timing waveform and parameters for low- frequency and high-frequency operation for ...

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Two-Wire Serial Interface Timing This section provides information associated with device parameters that control the timing of the two-wire serial interface. The two-wire serial interface conforms to industry-standard timing for standard and fast mode operation. Figure 5. Two-Wire Serial ...

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VSC055-01 Data Sheet 4.3 Operating Conditions The following table lists the recommended operating conditions for the VSC055-01 device. Table 23. Recommended Operating Conditions Parameter Power supply voltage (1) Operating temperature 1. Lower limit of specification is ambient temperature, and upper ...

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Two-Wire Serial Interface Operation The following illustration shows the two-wire serial interface read and write capabilities of the VSC055-01. All operations can be performed in any order. Figure 6. Two-Wire Serial Interface Operation S Slave T Address Address (n) ...

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VSC055-01 Data Sheet 4.6 Oscillator Requirements The VSC055-01 can use an external 3.3-V, 8.0 MHz to 12.5 MHz clock source connected to the OSCI pin, with CKSEL2 tied OSCI pin with CKSEL2 tied to V clock source ...

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Pin Descriptions This section contains the pin diagram and descriptions for the VSC055-01 device. 5.1 Pin Diagram The VSC055-01 has 100 pins. All pins have been placed to optimize their connection to external components. Power and ground distribution is ...

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VSC055-01 Data Sheet The following illustration shows the top view of the pin diagram. Figure 10. Pin Diagram, Top View P0.2 1 VSS VDD VDD2 P0.1 P0.0 TEST ASEL CKOUT OSCO OCSI VSS VDD CKSEL0 CKSEL1 ...

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Pin Identifications This section contains the functional descriptions for the VSC055-01device. Table 25. Serial Interface Pin Name Pin Number ASEL 11 SCL 22 SDA 23 Table 26. Clock Pin Name Pin Number OSCI ...

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VSC055-01 Data Sheet Table 27. Clock Control Pin Name Pin Number CKSEL2 19 CKSEL1 18 CKSEL0 17 Table 28. Interrupt Pin Name Pin Number INT# 24 Table 29. Multiple Device Synchronization Pin Name Pin Number SYNC# 20 SYNCEN 21 I/O ...

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Table 30. I/O Ports Pin Name Pin Number P0.7 96 P0.6 97 P0.5 98 P0.4 99 P0.3 100 P0.2 1 P0.1 5 P0.0 6 P1.7 86 P1.6 87 P1.5 88 P1.4 89 P1.3 92 P1.2 93 P1.1 94 P1.0 95 ...

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VSC055-01 Data Sheet Table 30. I/O Ports (continued) Pin Name Pin Number P4.7 57 P4.6 58 P4.5 59 P4.4 60 P4.3 61 P4.2 62 P4.1 63 P4.0 64 P5.7 46 P5.6 47 P5.5 48 P5.4 49 P5.3 50 P5.2 51 ...

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Table 30. I/O Ports (continued) Pin Name Pin Number P7.7 25 P7.6 26 P7.5 30 P7.4 31 P7.3 32 P7.2 33 P7.1 34 P7.0 35 Table 31. Test Pin Name Pin No. TEST 7 Table 32. Power Supplies Pin Name ...

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... The VSC055-01 device is available in two package types. VSC055KM- 100-pin, plastic quad flat package (QFP) with body width body length, 2.7 mm body thickness, 0.65 mm pitch, and 3.1 mm maximum height. The device is also available in a lead(Pb)-free package, VSC055XKM-01. Lead(Pb)-free products from Maxim comply with the temperatures and profiles defined in the joint IPC and JEDEC standard IPC/JEDEC J-STD-020 ...

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Figure 11. Package Drawing Top View Pin 1 Indicator See detail B Detail A R2 radius R1 radius All dimensions and tolerances in millimeters. Revision 4.1 January 2008 Side View See detail A Seating plane Detail B 132 of 133 ...

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... Ordering Information The VSC055-01 device is available in two package types. VSC055KM- 100-pin plastic QFP. The device is also available in a lead(Pb)-free package, VSC055XKM-01. Lead(Pb)-free products from Maxim comply with the temperatures and profiles defined in the joint IPC and JEDEC standard IPC/JEDEC J-STD-020. For more information, see the IPC and JEDEC standard. ...

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