vsc055xkm-01 Maxim Integrated Products, Inc., vsc055xkm-01 Datasheet - Page 60

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vsc055xkm-01

Manufacturer Part Number
vsc055xkm-01
Description
Enhanced I?c Backplane Controller
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
3.2.54 4Ch: Fan Speed Control 7 (FSC7)
Revision 4.1
January 2008
The following table shows the bit assignments for the Fan Speed Control 7 register. This register functions
same the Fan Speed Control 0 register except it affects the P2.7 pin.
Register Name:
Address:
Reset Value:
Bit
7
6
5:2
1:0
Bit Label
FSCEN
FSIEN
RES
FD1-0
FSC7
4Ch
00XX_XX00b
Access
R/W
R/W
R
R/W
Description
Fan Speed Control Enable
When this bit is set, P2.7 is automatically configured to provide a fan speed
monitoring input. Configurations for this I/O pin that may have been previously
enabled through other control registers are overridden, except for the bypass
select function (bits 6 and 5 of the appropriate bit control registers). If the
appropriate bypass bits are set, the odd-numbered fan speed input pins (P2.1,
P2.3, P2.5, or P2.7) are configured as outputs.
When this bit is reset, the remaining bits in this register have no effect on the
operation of P2.7.
When enabled as a fan speed monitoring input, pulses from the fan tachometer
output gate an internal 20 kHz clock into an 8-bit counter. A divisor value stored
in bits 1 and 0 of this register allow the user to select one of four nominal RPM
values based on fan tachometer outputs, which pulse twice per revolution. The
FSCC7 register provides the user with an accurate binary fan speed count
value that can be used to determine the current RPM value of the fan.
Incoming pulses are filtered and conditioned to accommodate the slow rise and
fall times typical of fan tachometer outputs.
The maximum input signal is limited to a range of V
supplied from a fan tachometer output that exceeds this range, external
components are required to limit the signal to an acceptable range.
Fan Speed Interrupt Enable
When this bit is set, the P2.7 input generates an interrupt if the 8-bit counter
value is greater than or equal to the count overflow value loaded into the
FSCO7 register. If this condition occurs, the INT# pin asserts and a binary
value equal to the address of this register appears in the BCIS register. When
this bit is reset, the fan speed monitoring logic does not generate an interrupt
condition.
Reserved.
Fan Divisor
These two bits determine the divisor value used to determine the correct range
of RPM values supplied to the 8-bit fan speed counter. The available fan divisor
values are as follows:
The decimal count value can be calculated using the following equation:
Any nominal RPM value can be used in the above equation with the
appropriate divisor as long as the maximum non-failure count value does not
exceed the limits of an 8-bit counter. Typical applications may consider 60% to
70% of nominal RPM a fan failure, which would result in a decimal count value
of 250 (FAh) and 214 (D6h), respectively, at the above stated RPM values.
FD1
0
0
1
1
Decimal count value = (1,200,000) / (RPM × divisor)
60 of 133
FD0
0
1
0
1
Divisor
1
2
4
8
Nominal RPM Decimal Count Value
8000
4000
2000
1000
150 (96h)
150 (96h)
150 (96h)
150 (96h)
SS
to V
DD
. If this input is
VSC055-01
Data Sheet

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