74LVU04PW,118 NXP Semiconductors, 74LVU04PW,118 Datasheet

IC HEX INVERTER 14TSSOP

74LVU04PW,118

Manufacturer Part Number
74LVU04PW,118
Description
IC HEX INVERTER 14TSSOP
Manufacturer
NXP Semiconductors
Series
74LVUr
Datasheet

Specifications of 74LVU04PW,118

Logic Type
Inverter
Number Of Inputs
1
Number Of Circuits
6
Current - Output High, Low
12mA, 12mA
Voltage - Supply
1 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVU04PW-T
74LVU04PW-T
935175200118
1. General description
2. Features
3. Applications
The 74LVU04 is a low-voltage Si-gate CMOS device that is pin and function compatible
with 74HCU04.
The 74LVU04 is a general purpose hex inverter. Each of the six inverters is a single stage
with unbuffered outputs.
74LVU04
Hex inverter
Rev. 06 — 20 December 2007
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Typical output ground bounce < 0.8 V at V
Typical HIGH-level output voltage (V
T
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
Linear amplifier
Crystal oscillator
Astable multivibrator
amb
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
= 25 C
OH
) undershoot: > 2 V at V
CC
= 3.3 V and T
amb
= 25 C
CC
Product data sheet
= 3.3 V and

Related parts for 74LVU04PW,118

74LVU04PW,118 Summary of contents

Page 1

Hex inverter Rev. 06 — 20 December 2007 1. General description The 74LVU04 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HCU04. The 74LVU04 is a general purpose hex inverter. Each of the six ...

Page 2

... NXP Semiconductors 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LVU04N +125 C 74LVU04D +125 C 74LVU04DB +125 C 74LVU04PW +125 C 74LVU04BQ +125 C 5. Functional diagram mna342 Fig 1. Logic symbol 74LVU04_6 Product data sheet Description DIP14 plastic dual in-line package; 14 leads (300 mil) SO14 plastic small outline package ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVU04 GND Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 6.2 Pin description Table 2. Pin description Symbol Pin GND 74LVU04_6 Product data sheet 001aah108 (1) The die substrate is attached to this pad using Fig 5. Pin configuration DHVQFN14 ...

Page 4

... NXP Semiconductors 7. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level. 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current ...

Page 5

... NXP Semiconductors 9. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate [1] The static characteristics are guaranteed from ...

Page 6

... NXP Semiconductors Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I supply current CC C input capacitance I [1] Typical values are measured at T 11. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; For test circuit see ...

Page 7

... NXP Semiconductors 12. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. The input (nA) to output (nY) propagation delays Table 8. Measurement points Supply voltage V CC < 2 3.6 V 4.5 V Test data is given in Table 9. Defi ...

Page 8

... NXP Semiconductors 13. Transfer characteristics 1 ( amb Fig amb Fig 10 3 74LVU04_6 Product data sheet 001aah111 300 2 ( 1.6 200 1.2 0.8 100 0.4 0 0.8 1.2 V (V) I Fig 9. V 001aah113 (mA 2.0 3.0 V (V) I Fig 11. Test set-up for measuring forward Rev. 06 — 20 December 2007 ...

Page 9

... NXP Semiconductors amb Fig 12. Forward transconductance as a function of the supply voltage 74LVU04_6 Product data sheet (mA/ Rev. 06 — 20 December 2007 74LVU04 001aah114 (V) CC © NXP B.V. 2007. All rights reserved. Hex inverter ...

Page 10

... NXP Semiconductors 14. Application information Some applications are: • Linear amplifier (see • In crystal oscillator design (see • Astable multivibrator (see Remark: All values given are typical unless otherwise specified U04 Maximum 1.5 V centered at 0.5V o(p- – --------------------------------------- ------ - open loop gain ...

Page 11

... NXP Semiconductors Table 11. Optimum value for R2 Frequency R2 3 kHz 2 kHz 1 kHz 0 kHz 0.5 k 1.0 k >14 kHz - U04 --- --------------- - T 2.2RC The average I (mA) is approximately CC 3 (MHz (pF Fig 15. Astable multivibrator 74LVU04_6 Product data sheet Optimum for minimum required I CC minimum infl ...

Page 12

... NXP Semiconductors 15. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 13

... NXP Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 14

... NXP Semiconductors SSOP14: plastic shrink small outline package; 14 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT337-1 Fig 19. Package outline SOT337-1 (SSOP14) ...

Page 15

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 16

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 17

... Document ID Release date 74LVU04_6 20071220 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section • Section • ...

Page 18

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 19

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Transfer characteristics Application information ...

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