k9f6408u0a Samsung Semiconductor, Inc., k9f6408u0a Datasheet - Page 3

• Manufacturer Part Number: k9f6408u0a
• Description: 8m X 8 Bit Nand Flash Memory
• Manufacturer: Samsung Semiconductor, Inc.

K9F6408U0A-TCB0, K9F6408U0A-TIB0
Figure 2. ARRAY ORGANIZATION
Figure 1. FUNCTIONAL BLOCK DIAGRAM
(=1024 Blocks)
16K Pages
V
V
CC
SS
NOTE : Column Address : Starting Address of the Register.
2nd Cycle
3rd Cycle
1st Cycle
CE
RE
WE
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
* A
* X can be High or Low.
Command
8
A
A
is set to "Low" or "High" by the 00h or 01h Command.
1st half Page Register
(=256 Bytes)
9
0
- A
- A
I/O 0
22
A
7
A
A
17
0
9
Page Register
512Bytes
512 Bytes
& High Voltage
I/O 1
CLE
Control Logic
A
A
A
10
18
Command
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Generator
1
Register
2nd half Page Register
(=256 Bytes)
ALE
I/O 2
A
A
A
A
8
11
19
WP
2
I/O 3
16 Bytes
16 Bytes
A
A
A
12
20
3
3
I/O 4
A
A
A
13
21
4
I/O 0 ~ I/O 7
2nd half Page Register & S/A
1st half Page Register & S/A
Global Buffers
I/O 5
A
A
(512 + 16)Byte x 16384
A
14
22
I/O Buffers & Latches
5
8 bit
64M + 2M Bit
NAND Flash
1 Page = 528 Bytes
1 Block = 528 Bytes x 16 Pages
1 Device = 528 Bytes x 16Pages x 1024 Blocks
1 Block =16 Pages
= (8K + 256) Bytes
Y-Gating
Y-Gating
ARRAY
I/O 6
A
A
*X
15
6
= (8K + 256) Bytes
= 66 Mbits
I/O 7
A
A
*X
FLASH MEMORY
16
7
Output
Driver
Column Address
Row Address
(Page Address)
V
SS
I/0 0
I/0 7