ST93C46AB1013TR STMICROELECTRONICS [STMicroelectronics], ST93C46AB1013TR Datasheet - Page 7

• Manufacturer Part Number: ST93C46AB1013TR
• Description: 1K 64 x 16 or 128 x 8 SERIAL MICROWIRE EEPROM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Erase
The Erase instruction (ERASE) programs the ad-
dressed memory byte or word bits to ’1’. Once the
address is correctly decoded,the falling edge of the
Chip Select input (S) starts a self-timed program-
ming cycle.
If the ST93C46 is still performing the write cycle,
the Busy signal (Q = 0) will be returned if S is driven
high, and the ST93C46 will ignore any data on the
bus. When the write cycle is completed, the Ready
Figure 6. READ, WRITE, EWEN, EWDS Sequences
Notes: 1. An: n = 5 for x16 org. and 6 for x8 org.
2. Xn: n = 3 for x16 org. and 4 for x8 org.
READ
WRITE
ERASE
WRITE
ENABLE
S
Q
S
S
Q
D
D
D
1 0
1
1 1 0 An
CODE
CODE
CODE
OP
OP
0
OP
1
0
1
An
1
ADDR
ADDR
Xn X0
A0
A0
Qn
Dn
DATA OUT
DATA IN
signal (Q = 1) will indicate (if S is driven high) that
the ST93C46 is ready to receive a new instruction.
Write
The Write instruction (WRITE) is followed by the
address and the 8 or 16 data bits to be written. Data
input is sampled on the Low to High transition of
the clock. After the last data bit has been sampled,
Chip Select (S) must be brought Low before the
next rising edge of the clock (C), in order to start
the self-timed programming cycle. If the ST93C46
is still performing the write cycle, the Busy signal
ERASE
WRITE
DISABLE
ST93C46A/46C/46T, ST93C47C/47T
S
D
D0
Q0
BUSY
1
CODE
STATUS
CHECK
0
OP
0
0
0
READY
Xn X0
AI00878C
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