CY7C1081DV33-12BAXI CYPRESS [Cypress Semiconductor], CY7C1081DV33-12BAXI Datasheet

CY7C1081DV33-12BAXI

Manufacturer Part Number

CY7C1081DV33-12BAXI

Description

64-Mbit (4 M x 16) Static RAM 2.0-V data retention

Manufacturer

CYPRESS [Cypress Semiconductor]

Datasheet

1.CY7C1081DV33-12BAXI.pdf (13 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

BOSTOCK HK LIMITED

Part Number:

CY7C1081DV33-12BAXI

Manufacturer:

Cypress Semiconductor Corp

Quantity:

10 000

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Features

■

Cypress Semiconductor Corporation

Document #: 001-53992 Rev. *C

Logic Block Diagram

High speed

❐

Low active power

❐

Low complementary metal oxide semiconductor (CMOS)

standby power

❐

Operating voltages of 3.3 ± 0.3 V

2.0-V data retention

Automatic power-down when deselected

Transistor-transistor logic (TTL)-compatible inputs and outputs

Easy memory expansion with CE

Available in Pb-free 48-ball fine ball grid array (FBGA) package

SB2

= 12 ns

= 300 mA at 12 ns

= 100 mA

(10:0)

and CE

•

COLUMN DECODER

features

198 Champion Court

DATA

RAM ARRAY

4M × 16

(21:11)

DRIVERS

Functional Description

The CY7C1081DV33 is a high-performance CMOS static RAM

organized as 4,194,304 words by 16 bits.

To write to the device, take Chip Enables (CE

HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O

written into the location specified on the address pins (A

(I/O

address pins (A

To read from the device, take Chip Enables (CE

HIGH) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data

from the memory location specified by the address pins appears

on I/O

memory appears on I/O

9 for a complete description of read and write modes.

The input and output pins (I/O

high impedance state when the device is deselected (CE

or CE

high enable and byte low enable are disabled (BHE, BLE HIGH),

or during a write operation (CE

LOW).

64-Mbit (4 M × 16) Static RAM

). If Byte High Enable (BHE) is LOW, then data from I/O pins

through I/O

•

to I/O

LOW), the outputs are disabled (OE HIGH), both byte

San Jose

. If Byte High Enable (BHE) is LOW, then data from

through A

) is written into the location specified on the

CA 95134-1709

to I/O

I/O

BLE

BHE

through I/O

. See the

–I/O

LOW, CE

CY7C1081DV33

Revised May 4, 2011

Truth Table

•

) are placed in a

through I/O

HIGH, and WE

LOW and CE

408-943-2600

on page

through

HIGH

) is

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