AMD-K6 AMD [Advanced Micro Devices], AMD-K6 Datasheet - Page 230

• Manufacturer Part Number: AMD-K6
• Description: AMD-K6 Processor
• Manufacturer: AMD [Advanced Micro Devices]

AMD-K6
TAP Controller State
Machine
212
®
Processor Data Sheet
SAMPLE/PRELOAD. The SAMPLE/PRELOAD instruction performs
two functions. These functions are as follows:
The SAMPLE/PRELOAD instruction does not affect the normal
operational state of the processor.
BYPASS. The BYPASS instruction selects the BR register, which
reduces the boundary-scan length through the processor from
281 to one (TDI to BR to TDO). The BYPASS instruction does
not affect the normal operational state of the processor.
IDCODE. The IDCODE instruction selects the DIR register,
allowing the device identification code to be shifted out of the
processor. This instruction is loaded into the IR when the TAP
controller is reset. The IDCODE instruction does not affect the
normal operational state of the processor.
HIGHZ. T h e H I G H Z i n s t r u c t i o n f o rc e s a l l o u t p u t a n d
bidirectional pins to be floated. During this instruction, the BR
is selected and the normal operational state of the processor is
not affected.
The TAP controller state diagram is shown in Figure 73 on page
213. State transitions occur on the rising edge of TCK. The
logic 0 or 1 next to the states represents the value of the TMS
signal sampled by the processor on the rising edge of TCK.
During the Capture-DR state, the processor loads the BSR
shift register with the current state of every input, output,
and bidirectional pin.
During the Update-DR state, the BSR output register is
loaded from the BSR shift register in preparation for the
next EXTEST instruction.
Preliminary Information
Test and Debug
20695H/0—March 1998
Chapter 11