HEF4043BT NXP [NXP Semiconductors], HEF4043BT Datasheet - Page 6

• Manufacturer Part Number: HEF4043BT
• Description: Quad R/S latch with 3-state outputs
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 8.
P
12. Waveforms
HEF4043B_6
Product data sheet
Symbol
P
D
Fig 4.
D
can be calculated from the formulas shown. V
t
Logic levels: V
Transition times: transition time (t
Measurement points are given in
Input minimum set (nS) and reset (nR) pulse widths, inputs nS or nR to latch output (nQ) propagation
delay and nQ transition time
r
Dynamic power dissipation P
Parameter
dynamic power
dissipation
and t
f
are the input rise and fall times
OL
and V
OH
V
10 V
15 V
5 V
DD
are typical output voltage levels that occur with the output load.
output nQ
input nR
input nS
t
) = HIGH LOW (t
Table 9
Typical formula for P
P
P
P
D
V
V
D
D
D
0 V
0 V
OH
OL
V
V
= 1100
= 4400
= 11400
I
I
and test data is given in
Rev. 06 — 11 November 2008
10 %
SS
= 0 V; t
10 %
THL
f
f
V
i
i
f
90 %
+ (f
+ (f
M
i
) or LOW HIGH (t
+ (f
t
r
r
t
V
W
= t
90 %
t
M
PLH
t
o
o
TLH
f
o
D
C
C
20 ns; T
C
( W)
L
L
)
)
L
t
Table
f
)
V
V
V
DD
DD
TLH
amb
10.
DD
V
2
2
M
) transition times.
2
t
W
= 25 C.
t
PHL
t
THL
001aai286
Quad R/S latch with 3-state outputs
where:
f
f
C
V
i
o
(C
DD
= input frequency in MHz;
L
= output frequency in MHz;
= output load capacitance in pF;
L
= supply voltage in V;
f
o
) = sum of the outputs.
HEF4043B
© NXP B.V. 2008. All rights reserved.
6 of 13