MC14549 ONSEMI [ON Semiconductor], MC14549 Datasheet - Page 7

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MC14549

Manufacturer Part Number
MC14549
Description
Successive Approximation Registers
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet

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Externally Controlled 6–Bit ADC (Figure 2)
Continuously Cycling 8–Bit ADC (Figure 3)
signal is fed back to the SC input, immediately initiating a
new cycle on the next clock pulse.
Several features are shown in this application:
This ADC is running continuously because the EOC
Shortening of the register to six bits by feeding the
seventh output bit into the FF input.
Continuous conversion, if a continuous signal is applied
to SC.
Externally controlled updating (the start pulse must be
shorter than the conversion cycle).
The EOC output indicating that the parallel data are valid
and that the serial output is complete.
Figure 3. Continuously Cycling 8–Bit ADC
Figure 2. Externally Controlled 6–Bit ADC
MC14549B, MC14559B
TYPICAL APPLICATIONS
http://onsemi.com
7
Continuously Cycling 12–Bit ADC (Figure 4)
has a capability of handling only an eight–bit word, two
must be cascaded to make an ADC with more than eight bits.
SAR must have a stable resettable state to remain in while
awaiting a subsequent start signal. However, the first stage
must not have a stable resettable state while recycling,
because during switch–on or due to outside influences, the
first stage has entered a reset state, the entire ADC will
remain in a stable non–functional condition.
well as the parallel outputs are updated every thirteenth
clock pulse. The EOC pulse indicates the completion of the
12–bit conversion cycle, the end of the serial output word,
and the validity of the parallel data output.
Because each successive approximation register (SAR)
When it is necessary to cascade two SAR’s, the second
This 12–bit ADC is continuously recycling. The serial as

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