MC74HC541ADW ONSEMI [ON Semiconductor], MC74HC541ADW Datasheet - Page 6

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MC74HC541ADW

Manufacturer Part Number
MC74HC541ADW
Description
Octal 3−State Noninverting Buffer/Line Driver/Line Receiver High−Performance Silicon−Gate CMOS
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet

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INPUTS
A1, A2, A3, A4, A5, A6, A7, A8 (PINS 2, 3, 4, 5, 6, 7, 8, 9)
form on the corresponding Y outputs, when the outputs are
enabled.
CONTROLS
OE1, OE2 (PINS 1, 19)
applied to both of these pins, the outputs are enabled and the
Data input pins. Data on these pins appear in non−inverted
Output enables (active−low). When a low voltage is
INPUT A
OE1
OE2
One of Eight
Buffers
To 7 Other Buffers
PIN DESCRIPTIONS
Figure 7. Logic Detail
http://onsemi.com
MC74HC541A
6
device functions as an non−inverting buffer. When a high
voltage is applied to either input, the outputs assume the high
impedance state.
OUTPUTS
Y1, Y2, Y3, Y4, Y5, Y6, Y7, Y8 (PINS 18, 17, 16, 15, 14,
13, 12, 11)
enable pins, these outputs are either non−inverting outputs
or high−impedance outputs.
Device outputs. Depending upon the state of the output
V
CC
OUTPUT Y

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