MC74LCX573_05 ONSEMI [ON Semiconductor], MC74LCX573_05 Datasheet - Page 2

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MC74LCX573_05

Manufacturer Part Number
MC74LCX573_05
Description
Low-Voltage CMOS Octal Transparent Latch Flow Through Pinout With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
V
OE
20
CC
1
PIN NAMES
PINS
OE
LE
D0−D7
O0−O7
H = High Voltage Level;
h = High Voltage Level One Setup Time Prior to the Latch Enable High−to−Low Transition
L = Low Voltage Level
l = Low Voltage Level One Setup Time Prior to the Latch Enable High−to−Low Transition
NC = No Change, State Prior to the Latch Enable High−to−Low Transition
X = High or Low Voltage Level or Transitions are Acceptable
Z = High Impedance State
For I
TRUTH TABLE
O0
D0
19
2
CC
OE
H
H
H
H
H
L
L
L
L
L
Figure 1. Pinout (Top View)
Reasons DO NOT FLOAT Inputs
O1
D1
18
3
FUNCTION
Output Enable Input
Latch Enable Input
Data Inputs
3−State Latch Outputs
O2
D2
17
4
INPUTS
LE
H
H
H
H
L
L
L
L
L
L
O3
D3
16
5
O4
D4
15
6
Dn
O5
D5
14
H
X
X
H
L
h
L
h
7
l
l
O6
D6
13
8
O7
D7
http://onsemi.com
12
OUTPUTS
9
MC74LCX573
On
NC
H
H
Z
Z
Z
Z
Z
L
L
GND
LE
11
10
2
Transparent (Latch Disabled); Disabled Outputs
Latched (Latch Enabled); Disabled Outputs
Transparent (Latch Disabled); Read Latch
Latched (Latch Enabled) Read Latch
OE
D0
D1
D2
D3
D4
D5
D6
D7
LE
11
1
Hold; Disabled Outputs
OPERATING MODE
Hold; Read Latch
2
3
4
5
6
7
8
9
Figure 2. Logic Diagram
nLE
D
nLE
D
nLE
D
nLE
D
nLE
D
nLE
D
nLE
D
nLE
D
Q
Q
Q
Q
Q
Q
Q
Q
19
18
17
16
15
14
13
12
O0
O1
O2
O3
O4
O5
O6
O7

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