CAT9555 CATALYST [Catalyst Semiconductor], CAT9555 Datasheet - Page 8

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CAT9555

Manufacturer Part Number
CAT9555
Description
16-bit I2C and SMBus I/O Port with Interrupt
Manufacturer
CATALYST [Catalyst Semiconductor]
Datasheet

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0
Configuration Pulse
CAT9555
INT
INT
INT: Interrupt Output
INT
INT
The open-drain interrupt output is activated when one of
the port pins configured as an input changes state
(differs from the corresponding input port register bit
state). The interrupt is deactivated when the input returns
to its previous state or the input port register is read.
Doc. No. 8551, Rev. E
Shift Register
Shift Register
Shift Register
Read Pulse
Write Pulse
Data from
Data from
Data from
Register
Polarity
Write
Write
Configuration
C K
D
Register
FF
Q
Q
Figure 4. Simplified Schematic of I/Os
C K
D
Output Port
Register
FF
Q
Q
8
Since there are two 8-bit ports that are read independently,
the interrupt caused by Port 0 will not be cleared by a
read of Port 1, or vice versa.
Changing an I/O from an output to and input may cause
a false interrupt if the state of the pin does not match the
contents of the input port register.
Inversion Register
C K
C K
D
D
Input Port
Register
LATCH
Polarity
FF
Q
Q
Q
Q
Q1
Q2
Characteristics subject to change without notice
© 2007 by Catalyst Semiconductor, Inc.
Output Port
Register Data
I/O Pin
Input Port
Register Data
V CC
V SS
To INT
Polarity
Register Data

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