ADC121C021CIMKX NSC [National Semiconductor], ADC121C021CIMKX Datasheet - Page 22

• Manufacturer Part Number: ADC121C021CIMKX
• Description: I2C-Compatible, 12-Bit Analog-to-Digital Converter (ADC) with Alert Function
• Manufacturer: NSC [National Semiconductor]

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1.8 ALERT FUNCTION
The ALERT function is an "out-of-range" indicator. At the end
of every conversion, the measured voltage is compared to the
values in the V
age exceeds the value stored in V
stored in V
is indicated in up to three places. First, the alert condition al-
ways causes either or both of the alert flags in the Alert Status
register to go high. If the measured voltage exceeds the
V
voltage falls below the V
is set. Second, if the Alert Flag Enable bit is set in the Con-
figuration register, the alert condition also sets the MSB of the
Conversion Result register. Third, if the Alert Pin Enable bit is
set in the Configuration register, the ALERT output becomes
active (see Figure 9). The ALERT output can be configured
as an active high or active low output via the Polarity bit in the
Configuration register. If the Polarity bit is cleared, the ALERT
output is configured as active low. If the Polarity bit is set, the
ALERT output is configured as active high.
The Over Range Alert condition is cleared when one of the
following two conditions is met:
1.
2.
The Under Range Alert condition is cleared when one of the
following two conditions is met:
1.
2.
If the alert condition has been cleared by writing a one to the
alert flag while the measured voltage still violates the V
or V
completion of the next conversion (see Figure 10).
Alert conditions only occur if the input voltage exceeds the
V
instant. The input voltage can exceed the V
below the V
causing an alert condition.
HIGH
HIGH
LOW
The controller writes a one to the Over Range Alert Flag
bit.
The measured voltage reduces below the programmed
V
Alert Hold bit is cleared in the Configuration register. (see
Figure 9). If the Alert Hold bit is set, the alert condition
persists and only clears when a one is written to the Over
Range Alert Flag bit.
The controller writes a one to the Under Range Alert Flag
bit.
The measured voltage increases above the programmed
V
Alert Hold bit is cleared in the Configuration register. If
the Alert Hold bit is set, the alert condition persists and
only clears when a one is written to the Under Range
Alert Flag bit.
limit, the Over Range Alert Flag is set. If the measured
HIGH
LOW
limit or falls below the V
limits, an alert condition will occur again after the
limit plus the programmed V
LOW
limit minus the programmed V
LOW
, an alert condition occurs. The Alert condition
HIGH
limit briefly between conversions without
and V
LOW
LOW
limit, the Under Range Alert Flag
registers. If the measured volt-
LOW
HIGH
limit at the sample-hold
or falls below the value
HYST
HYST
value and the
HIGH
value and the
limit or fall
HIGH
22
FIGURE 10. Alert condition cleared by writing a "1" to the
1.9 AUTOMATIC CONVERSION MODE
The automatic conversion mode configures the ADC to con-
tinually perform conversions without receiving "read" instruc-
tions from the controller over the I
activated by writing a non-zero value into the Cycle Time bits
- D[7:5] - of the configuration register (see section 1.6.4).
Once the ADC121C021 enters this mode, the internal oscil-
lator is always enabled. The ADC's control logic samples the
input at the sample rate set by the cycle time bits. Although
the conversion result is not transmitted by the 2-wire interface,
it is stored in the conversion result register and updates the
various status registers of the device.
In automatic conversion mode, the out-of-range alert function
is active and updates after every conversion. The ADC can
operate independently of the controller in automatic conver-
sion mode. When the input signal goes "out-of-range", an
alert signal is sent to the controller. The controller can then
read the status registers and determine the source of the alert
condition. Also, comparison and updating of the V
V
conversion mode. The controller can ocassionally read the
V
extremes. These register values persist until the user resets
the V
system monitoring, peak detection, and sensing applications.
MAX
MIN
FIGURE 9. Alert condition cleared when measured
MIN
and/or V
registers occurs after every conversion in automatic
and V
MAX
voltage crosses V
MAX
registers to determine the sampled input
registers. These two features are useful in
Alert Flag.
HIGH
2
C interface. The mode is
- V
HYST
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MIN
and