PCA9685BS NXP [NXP Semiconductors], PCA9685BS Datasheet

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PCA9685BS

Manufacturer Part Number
PCA9685BS
Description
16-channel, 12-bit PWM Fm+ I2C-bus LED controller
Manufacturer
NXP [NXP Semiconductors]
Datasheet

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PCA9685BS,118
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1. General description
The PCA9685 is an I
Red/Green/Blue/Amber (RGBA) color backlighting applications. Each LED output has its
own 12-bit resolution (4096 steps) fixed frequency individual PWM controller that operates
at a programmable frequency from a typical of 40 Hz to 1000 Hz with a duty cycle that is
adjustable from 0 % to 100 % to allow the LED to be set to a specific brightness value.
All outputs are set to the same PWM frequency.
Each LED output can be off or on (no PWM control), or set at its individual PWM controller
value. The LED output driver is programmed to be either open-drain with a 25 mA current
sink capability at 5 V or totem pole with a 25 mA sink, 10 mA source capability at 5 V. The
PCA9685 operates with a supply voltage range of 2.3 V to 5.5 V and the inputs and
outputs are 5.5 V tolerant. LEDs can be directly connected to the LED output (up to
25 mA, 5.5 V) or controlled with external drivers and a minimum amount of discrete
components for larger current or higher voltage LEDs.
The PCA9685 is in the new Fast-mode Plus (Fm+) family. Fm+ devices offer higher
frequency (up to 1 MHz) and more densely populated bus operation (up to 4000 pF).
Although the PCA9635 and PCA9685 have many similar features, the PCA9685 has
some unique features that make it more suitable for applications such as LCD backlighting
and Ambilight:
PCA9685
16-channel, 12-bit PWM Fm+ I
Rev. 02 — 16 July 2009
The PCA9685 allows staggered LED output on and off times to minimize current
surges. The on and off time delay is independently programmable for each of the
16 channels. This feature is not available in PCA9635.
The PCA9685 has 4096 steps (12-bit PWM) of individual LED brightness control. The
PCA9635 has only 256 steps (8-bit PWM).
When multiple LED controllers are incorporated in a system, the PWM pulse widths
between multiple devices may differ if PCA9635s are used. The PCA9685 has a
programmable prescaler to adjust the PWM pulse widths of multiple devices.
The PCA9685 has an external clock input pin that will accept user-supplied clock
(50 MHz max.) in place of the internal 25 MHz oscillator. This feature allows
synchronization of multiple devices. The PCA9635 does not have external clock input
feature.
Like the PCA9635, PCA9685 also has a built-in oscillator for the PWM control.
However, the frequency used for PWM control in the PCA9685 is adjustable from
about 40 Hz to 1000 Hz as compared to the typical 97.6 kHz frequency of the
PCA9635. This allows the use of PCA9685 with external power supply controllers. All
bits are set at the same frequency.
The Power-On Reset (POR) default state of LEDn output pins is LOW in the case of
PCA9685. It is HIGH for PCA9635.
2
C-bus controlled 16-channel LED controller optimized for LCD
2
C-bus LED controller
Product data sheet

Related parts for PCA9685BS

PCA9685BS Summary of contents

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PCA9685 16-channel, 12-bit PWM Fm+ I Rev. 02 — 16 July 2009 1. General description The PCA9685 Red/Green/Blue/Amber (RGBA) color backlighting applications. Each LED output has its own 12-bit resolution (4096 steps) fixed frequency individual PWM controller ...

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NXP Semiconductors The active LOW Output Enable input pin (OE) allows asynchronous control of the LED outputs and can be used to set all the outputs to a defined I state. The OE can also be used to externally ‘pulse ...

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... Ordering information Table 1. Ordering information Type number Topside mark PCA9685PW PCA9685PW [1] PCA9685PW/Q900 PCA9685PW PCA9685BS PCA9685BS [1] PCA9685PW/Q900 is AEC-Q100 compliant. Contact i2c.support@nxp.com for PPAP. PCA9685_2 Product data sheet 16-channel, 12-bit PWM Fm+ I Package Name Description TSSOP28 plastic thin shrink small outline package; 28 leads; body width 4.4 mm TSSOP28 plastic thin shrink small outline package ...

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NXP Semiconductors 5. Block diagram PCA9685 SCL INPUT FILTER SDA POWER- RESET V SS PRESCALE 25 MHz OSCILLATOR SWITCH EXTCLK OE Remark: Only one LED output shown for clarity. Fig 1. Block diagram of PCA9685 PCA9685_2 Product data ...

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... Rev. 02 — 16 July 2009 PCA9685 2 C-bus LED controller terminal 1 index area LED0 3 PCA9685BS LED1 4 5 LED2 LED3 6 LED4 7 Transparent top view Fig 3. Pin configuration for HVQFN28 Description address input 0 address input 1 address input 2 address input 3 address input 4 ...

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NXP Semiconductors Table 2. Symbol LED12 LED13 LED14 LED15 OE A5 EXTCLK SCL SDA V DD [1] HVQFN28 package die supply ground is connected to both V be connected to supply ground for proper device operation. For enhanced thermal, electrical, ...

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NXP Semiconductors • PCA9564 (0000 000) or PCA9665 (1110 000) slave address which is active on start-up • ‘reserved for future use’ I • slave devices that use the 10-bit addressing scheme (1111 0XX) • slave devices that are designed ...

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NXP Semiconductors 7.1.4 Software Reset I The address shown in performed by the master. The Software Reset address (SWRST Call) must be used with R/W = logic 0. If R/W = logic 1, the PCA9685 does not acknowledge the SWRST. ...

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NXP Semiconductors 7.3 Register definitions Table 3. Register summary Register Register Name # # (hex) (decimal ...

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NXP Semiconductors Table 3. Register summary …continued Register Register Name # # (hex) (decimal ...

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NXP Semiconductors Table 3. Register summary …continued Register Register Name # # (hex) (decimal ...

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NXP Semiconductors Table 3. Register summary …continued Register Register Name # # (hex) (decimal ...

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NXP Semiconductors 7.3.1 Mode register 1, MODE1 Table 4. MODE1 - Mode register 1 (address 00h) bit description Legend: * default value. Bit Symbol Access Value 7 RESTART EXTCLK R R/W ...

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NXP Semiconductors 7.3.1.1 Restart mode If the PCA9685 is operating and the user decides to put the chip to sleep (setting MODE1 bit 4) without stopping any of the PWM channels, the RESTART bit (MODE1 bit 7) will be set ...

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NXP Semiconductors 7.3.2 Mode register 2, MODE2 Table 5. MODE2 - Mode register 2 (address 01h) bit description Legend: * default value. Bit Symbol Access read only [1] 4 INVRT R/W 3 OCH R/W [1] 2 ...

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NXP Semiconductors Example 1: (assumes that the LED0 output is used and (delay time) + (PWM duty cycle) Delay time = 10 %; PWM duty cycle = 20 % (LED on time = 20 %; LED off time = 80 ...

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NXP Semiconductors STOP 0 example 1 LEDn_ON 511 LEDn_OFF example 2 LEDn_ON 2047 LEDn_OFF example 3 LEDn_ON 1023 example 4 off LEDn_ON 1023 LEDn_OFF 1023 Example 1: LEDn_ON < LEDn_OFF Example 2: LEDn_ON > LEDn_OFF Example 3: LEDn_ON[12 ...

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NXP Semiconductors STOP 0 register(s) updated in this cycle example 1 LEDn_ON 511 LEDn_OFF example 2 LEDn_ON 511 LEDn_OFF example 3 LEDn_ON 511 LEDn_OFF example 4 LEDn_ON 511 LEDn_OFF Example 1: LEDn_ON unchanged and LEDn_OFF decreased. Example 2: LEDn_ON increased ...

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STOP 0 4095 0 register(s) updated in this cycle example 1 LEDn_ON 3071 LEDn_OFF example 2 LEDn_ON 3071 LEDn_OFF example 3 LEDn_ON 3071 LEDn_OFF on example 4 off LEDn_ON LEDn_OFF Example 1: LEDn_ON unchanged and LEDn_OFF decreased, but delay still ...

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NXP Semiconductors Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description Legend: * default value. Address Register Bit 06h LED0_ON_L 7:0 07h LED0_ON_H 7:5 4 3:0 08h LED0_OFF_L 7:0 09h LED0_OFF_H 7:5 4 3:0 0Ah LED1_ON_L 7:0 ...

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NXP Semiconductors Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description Legend: * default value. Address Register Bit 18h LED4_OFF_L 7:0 19h LED4_OFF_H 7:5 4 3:0 1Ah LED5_ON_L 7:0 1Bh LED5_ON_H 7:5 4 3:0 1Ch LED5_OFF_L 7:0 ...

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NXP Semiconductors Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description Legend: * default value. Address Register Bit 2Ah LED9_ON_L 7:0 2Bh LED9_ON_H 7:5 4 3:0 2Ch LED9_OFF_L 7:0 2Dh LED9_OFF_H 7:5 4 3:0 2Eh LED10_ON_L 7:0 ...

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NXP Semiconductors Table 6. LED_ON, LED_OFF control registers (address 06h to 45h) bit description Legend: * default value. Address Register Bit 3Ch LED13_OFF_L 7:0 3Dh LED13_OFF_H 7:5 4 3:0 3Eh LED14_ON_L 7:0 3Fh LED14_ON_H 7:5 4 3:0 40h LED14_OFF_L 7:0 ...

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NXP Semiconductors 7.3.4 ALL_LED_ON and ALL_LED_OFF control The ALL_LED_ON and ALL_LED_OFF registers allow just four I to fill all the ON and OFF registers with the same patterns. Table 7. ALL_LED_ON and ALL_LED_OFF control registers (address FAh to FEh) bit ...

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NXP Semiconductors 7.3.6 SUBADR1 to SUBADR3, I Table 8. Legend: * default value. Address 02h 03h 04h Subaddresses are programmable through the I E4h, E8h, and the device(s) will not acknowledge these addresses right after power-up (the corresponding SUBx bit ...

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NXP Semiconductors 7.4 Active LOW output enable input The active LOW output enable (OE) pin, allows to enable or disable all the LED outputs at the same time. • When a LOW level is applied to OE pin, all the ...

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NXP Semiconductors 7.6 Software reset The Software Reset Call (SWRST Call) allows all the devices in the I the power-up state value through a specific formatted I correctly, it implies that the I bus. The SWRST Call function is defined ...

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NXP Semiconductors 7.7 Using the PCA9685 with and without external drivers The PCA9685 LED output drivers are 5.5 V only tolerant and can sink the device needs to drive LEDs to a ...

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NXP Semiconductors 8. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be ...

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NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 18. System configuration 8.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed ...

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NXP Semiconductors 9. Bus transactions slave address START condition (1) See Table 3 for register definition. Fig 20. Write to a specific register slave address ...

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NXP Semiconductors slave address START condition slave address (cont ReSTART condition data from LED15_OFF_H register not acknowledge Fig 22. Read all registers ...

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NXP Semiconductors slave address (1) sequence ( START condition slave address (1) sequence ( START condition LEDALLCALL I sequence ( ...

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NXP Semiconductors 10. Application design-in information V = 2 C-BUS/SMBus MASTER SDA SCL C-bus address = 1010 101x. All 16 of the LEDn outputs configurable as either ...

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NXP Semiconductors Question 1: What kind of edge rate control is there on the outputs? • The typical edge rates depend on the output configuration, supply voltage, and the applied load. The outputs can be configured as either open-drain NMOS ...

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NXP Semiconductors (1) Resistor value should be chosen by referencing Section 7 of UM10204, “I (2) OE requires pull-up resistor if control signal from the master is open-drain. Fig 27. LCD backlighting application PCA9685_2 Product data sheet 16-channel, 12-bit PWM ...

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NXP Semiconductors 11. Limiting values Table 12. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol I/O I O(LEDn tot T stg T amb 12. Static characteristics Table 13. Static characteristics V ...

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NXP Semiconductors Table 13. Static characteristics amb Symbol Parameter Address inputs; OE input; EXTCLK V LOW-level input voltage IL V HIGH-level input voltage IH I input ...

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Table 14. Dynamic characteristics Symbol Parameter Conditions f SCL clock frequency SCL f frequency on pin EXTCLK EXTCLK t bus free time between a STOP BUF and START condition t hold time (repeated) START HD;STA condition t set-up time for ...

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Table 14. Dynamic characteristics …continued Symbol Parameter Conditions t OFF-state to HIGH propagation OE to LEDn; PZH delay OUTNE[1: MODE2 register t LOW to HIGH propagation delay OE to LEDn; PLH OUTNE[1: ...

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NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 31. Definition of timing protocol SCL SDA Fig 32. I Fig 33. t PCA9685_2 Product data sheet 16-channel, 12-bit PWM Fm ...

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NXP Semiconductors 14. Test information Fig 34. Test circuitry for switching times Fig 35. Test circuitry for switching times for enable/disable Table 15. Test PLZ PZL PHZ PZH PCA9685_2 Product data sheet ...

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NXP Semiconductors 15. Package outline TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. ...

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NXP Semiconductors HVQFN28: plastic thermal enhanced very thin quad flat package; no leads; 28 terminals; body 0.85 mm terminal 1 index area terminal 1 28 index area DIMENSIONS (mm ...

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NXP Semiconductors 16. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 17. Soldering of SMD packages ...

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NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities ...

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NXP Semiconductors Fig 38. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 18. Abbreviations Table 18. Acronym CDM DUT EMI ESD HBM 2 I ...

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NXP Semiconductors 19. Revision history Table 19. Revision history Document ID Release date PCA9685_2 20090716 • Modifications: Table 1 “Ordering – added type number PCA9685PW/Q900 – added • Figure 2 “Pin configuration for PCA9685_1 20080724 PCA9685_2 Product data sheet 16-channel, ...

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NXP Semiconductors 20. Legal information 20.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

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NXP Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

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