XCR3128XL-6CS144C XILINX [Xilinx, Inc], XCR3128XL-6CS144C Datasheet
XCR3128XL-6CS144C
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XCR3128XL-6CS144C Summary of contents
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... Preliminary Product Specification 0 14 Description The XCR3128XL is a 3.3V 128 macrocell CPLD targeted at power sensitive designs that require leading edge program- mable logic solutions. A total of eight function blocks provide 3,000 usable gates. Pin-to-pin propagation delays are 6.0 ns with a maximum system frequency of 145 MHz. ...
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... XCR3128XL 128 Macrocell CPLD DC Electrical Characteristics Over Recommended Operating Conditions Symbol Parameter (2) V Output High voltage OH V Output Low voltage for 3.3V outputs OL I Input leakage current IL I I/O High-Z leakage current IH I Standby current CCSB (3,4) I Dynamic current CC (5) C Input pin capacitance IN C Clock input capacitance ...
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... Typical current draw during configuration 3.6V. 6. Output pF. L DS016 (v1.8) January 8, 2002 Preliminary Product Specification -6 Min. Max. - 5.5 (3) - 6.0 - 4.0 2.5 - 3 2 145 - 7.5 (6) - 7.5 - 6.5 - 8.0 Advance ) for recommended operating conditions. www.xilinx.com 1-800-255-7778 XCR3128XL 128 Macrocell CPLD (1,2) -7 -10 Min. Max. Min. Max. - 7.0 - 9.1 - 7.5 - 10.0 5.0 - 6.5 3.0 - 3.0 - 4.3 - 5.4 - 4 3.0 - 4.0 - 5 ...
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... XCR3128XL 128 Macrocell CPLD Internal Timing Parameters Symbol Parameter Buffer Delays T Input buffer delay IN T Fast Input buffer delay FIN T Global Clock buffer delay GCK T Output buffer delay OUT T Output buffer enable/disable delay EN Internal Register and Combinatorial Delays T Latch transparent delay ...
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... V Figure 3: AC Load Circuit +3.0V 0V Measurements: All circuit delays are measured at the +1.5V level of inputs and outputs, unless otherwise specified DS016_04_042800 PD2 www.xilinx.com 1-800-255-7778 XCR3128XL 128 Macrocell CPLD Values 390 390 Open Closed Closed Open Closed Closed , ...
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... Table 3: XCR3128XL I/O Pins (Continued) Function Block CS144 TQ144 3 108 108 CS144 TQ144 3 B12 106 3 (1) (1) D11 104 3 D12 102 3 D13 101 3 E10 100 3 E11 99 3 E12 ...
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... R Table 3: XCR3128XL I/O Pins (Continued) Function Block Macrocell VQ100 ( ...
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... TCK 62 TDI 4 TDO 73 TMS 15 (1) PORT_EN 11 Vcc 3, 18, 34, A10, B2, B6, 39, 51, 66, B8, D4, F11, 82, 91 J2, K6, K7, L13, N5, 8 Table 4: XCR3128XL Global, JTAG, Port Enable, Power, and No Connect Pins Pin Type TQ144 GND D7 128 C7 127 A7 126 B7 125 No Connects G12 D11 104 H2 20 ...
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... TQ144 144-pin Thin Quad Flat Pack Component Availability Pins Type Code XCR3128XL -6 -7 -10 Notes: 1. Parenthesis indicate future planned products. Please contact Xilinx for up-to-date information. DS016 (v1.8) January 8, 2002 Preliminary Product Specification XCR3128XL -7 VQ 100 C Package 100 144 Plastic VQFP Plastic TQFP VQ100 TQ144 (C) (C) C, (I) C, (I) C,I C,I www ...
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... XCR3128XL 128 Macrocell CPLD Revision History The following table shows the revision history for this document. Date Version 04/07/00 1.0 Initial Xilinx release. 05/03/00 1.1 Minor updates and added Boundary Scan to pinout table. 11/20/00 1.2 Updated pinout tables; corrected note in 12/08/00 1.3 Updated pinout tables. 01/17/01 1.4 Removed Timing Model. 04/11/01 1.5 Added Typical I/V curve, 04/19/01 1 ...