SAA7102_06 NXP [NXP Semiconductors], SAA7102_06 Datasheet
SAA7102_06
Related parts for SAA7102_06
SAA7102_06 Summary of contents
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SAA7102; SAA7103 Digital video encoder Rev. 04 — 18 January 2006 1. General description The SAA7102; SAA7103 is used to encode PC graphics data at maximum 800 × 600 resolution to PAL (50 Hz) or NTSC (60 Hz) video signals. ...
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Philips Semiconductors Macrovision Pay-per-View copy protection system rev. 7.01 and rev. 6.1 as option; this applies to the SAA7102 only Power-save modes Joint Test Action Group (JTAG) Boundary Scan Test (BST) Monolithic CMOS 3.3 V device tolerant I/Os ...
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V V DDD1 SSD1 41 PD11 to INPUT PD0 FORMATTER DECIMATOR (OR BYPASS) 15 PIXCLKI BORDER GENERATOR 20 CGC ...
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Philips Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Pin configuration (LBGA156) Fig 3. Pin configuration (QFP44) SAA7102_SAA7103_4 Product data sheet ball A1 index area SAA7102E G H ...
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Philips Semiconductors Table 3: Pin A10 6.2 Pin description Table 4: Symbol PD8 PD9 PD10 ...
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Philips Semiconductors Table 4: Symbol V DDD1 SCL SDA FSVGC VSVGC PIXCLKI PD3 PD2 PD1 PD0 PIXCLKO CBO HSVGC TTX_SRES TTXRQ_XCLKO2 VSM HSM_CSYNC RED_CR_C GREEN_VBS_CVBS C7 V DDA1 BLUE_CB_CVBS RSET DUMP V SSA1 XTALO XTALI SAA7102_SAA7103_4 Product data sheet Pin ...
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Philips Semiconductors Table 4: Symbol V DDA2 TRST TDI V SSD2 V DDD2 PD4 PD5 PD6 PD7 [1] Pin type input output supply. [2] In accordance with the “IEEE1149.1” standard the pins TDI, TMS, ...
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Philips Semiconductors Besides the applications for video output, the SAA7102; SAA7103 can also be used for generating a kind of auxiliary VGA output, when the RGB non-interlaced input signal is fed to the DACs. This may be of interest for ...
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Philips Semiconductors 7.1 Reset conditions To activate the reset a pulse at least of 2 crystal clocks duration is required. During reset (RESET = LOW) plus an extra 32 crystal clock periods, FSVGC, VSVGC, CBO, HSVGC and TTX_SRES are set ...
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Philips Semiconductors 7.4 Cursor insertion A 32 dots × 32 dots cursor can be overlaid as an option; the bit map of the cursor can be uploaded the PD port. In the latter case, the 256 bytes ...
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Philips Semiconductors Table 8: Cursor pattern 7.5 RGB Y-C RGB input signals to be encoded to PAL or NTSC are converted to the Y-C space in this block. The color difference signals are fed through low-pass ...
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Philips Semiconductors Due to the re-interlacing, the circuit can perform upscaling. The maximum factor depends on the setting of the anti-flicker function and can be derived from the formulae given in Section 7.8 FIFO The FIFO acts as a buffer ...
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Philips Semiconductors schemes. Other manipulations used for the Macrovision anti-taping process, such as additional insertion of AGC super-white pulses (programmable in height), are supported by the SAA7102 only. To enable easy analog post filtering, luminance is interpolated from a 13.5 ...
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Philips Semiconductors Data LOW at the output of the DACs corresponds to 0 IRE, data HIGH at the output of the DACs corresponds to approximately 50 IRE also possible to encode closed caption data for 50 Hz field ...
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Philips Semiconductors interlaced, in other cases it may be omitted. If the frame sync signal is present possible to derive the vertical and the horizontal phase from it by setting the HFS and VFS bits. HSVGC and VSVGC ...
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Philips Semiconductors bytes following subaddress FFh. For further write access auto-incrementing of the LUT address is performed. The cursor bit map access is similar to the LUT access but contains only a single byte per address. 2 The I C-bus ...
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Philips Semiconductors TPclk TPclk PCL = The input vertical offset can be taken from the assumption that the scaler should just have finished writing the first line when the encoder starts reading it: YOFS In most cases the vertical offsets ...
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Philips Semiconductors Due to the limited amount of memory it is not possible to get valid vertical scaler settings only from the formulae above. In some cases it is necessary to adjust the vertical offsets or the scaler increment to ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 640 × 400, full anti-flicker filter Table 9: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 640 × 400, half anti-flicker filter Table 10: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 640 × 400, no anti-flicker filter Table 11: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 640 × 480, full anti-flicker filter Table 12: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 640 × 480, half anti-flicker filter Table 13: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 640 × 480, no anti-flicker filter Table 14: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 800 × 600, full anti-flicker filter Table 15: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 800 × 600, half anti-flicker filter Table 16: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at NTSC, input frame size: 800 × 600, no anti-flicker filter Table 17: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 212 29 −2 212 31 212 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 640 × 400, full anti-flicker filter Table 18: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 640 × 400, half anti-flicker filter Table 19: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 640 × 400, no anti-flicker filter Table 20: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 640 × 480, full anti-flicker filter Table 21: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 640 × 480, half anti-flicker filter Table 22: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 640 × 480, no anti-flicker filter Table 23: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 800 × 600, full anti-flicker filter Table 24: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 800 × 600, half anti-flicker filter Table 25: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Y scaler programming at PAL, input frame size: 800 × 600, no anti-flicker filter Table 26: TV line Offset FAL Regular size (horizontal TV size: 640 pixels, offset ± 10 pixels) −4 255 35 −2 255 37 255 ...
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Philips Semiconductors Table 27: Color White Yellow Cyan Green Magenta Red Blue Black [1] Transformation 1.3707 × − 0.3365 × 1.7324 × (C Table 28 ...
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Philips Semiconductors Table 30 5-bit non-interlaced RGB Pin PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 Table 31 8-bit non-interlaced C Pin ...
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Philips Semiconductors Table 33: 8-bit non-interlaced index color Pin PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 [ don’t care. Table 34 8-bit non-interlaced RGB/C ...
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Bit allocation map Table 35: Slave receiver (slave address 88h) Register function Subaddress (hexadecimal) Status byte (read only) 00 Null Common DAC adjust fi DAC adjust coarse 17 G DAC adjust coarse 18 B ...
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Table 35: Slave receiver (slave address 88h) …continued Register function Subaddress (hexadecimal) Gain V 5C Gain U MSB, black level 5D Gain V MSB, blanking level 5E CCR, blanking level VBI 5F Null 60 Standard control 61 Burst amplitude 62 ...
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Table 35: Slave receiver (slave address 88h) …continued Register function Subaddress (hexadecimal) TTX even request vertical end 79 First active line 7A Last active line 7B TTX mode, MSB vertical 7C Null 7D Disable TTX line 7E Disable TTX line ...
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Table 35: Slave receiver (slave address 88h) …continued Register function Subaddress (hexadecimal) Blank enable for NI-bypass, A1 vertical line skip MSB Border color Y A2 Border color U A3 Border color V A4 Cursor color Cursor color ...
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Philips Semiconductors 2 8.2 I C-bus format control registers S 1000 1000 b. to cursor bit map (subaddress FEh) S 1000 1000 c. to color look-up table (subaddress FFh) Fig 1000 1000 a. to ...
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Philips Semiconductors Table 36: Code S Sr 1000 100X A Am SUBADDRESS DATA -------- P RAM ADDRESS [ the read/write control bit logic 0 is order to write logic 1 is order to read. ...
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Philips Semiconductors Table 38: Subaddress Bit 17h to 19h 17h 18h 19h Table 39: Bit MSMT[7:0] Table 40: Legend default value after reset. Bit SAA7102_SAA7103_4 Product data sheet ...
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Philips Semiconductors Table 41: Legend default value after reset. Subaddress Bit 27h 26h Table 42: Legend default value after reset. Bit 7 and Table 43: Legend default value after ...
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Philips Semiconductors Table 44: Legend default value after reset. Subaddress Bit 2Ch 2Bh 2Ah Table 45: Legend default value after reset. Bit and 0 - SAA7102_SAA7103_4 Product data sheet ...
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Philips Semiconductors Table 46: Legend default value after reset. Bit Table 47: Legend default value after reset. Bit Table 48: Legend default ...
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Philips Semiconductors Table 49: Legend default value after reset. Bit Table 50: Subaddress Bit 55h 56h 57h 58h 59h [1] In line 16; LSB first; all other bytes are not relevant for ...
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Philips Semiconductors Table 52: Gain U and gain U MSB, black level registers, subaddresses 5Bh and 5Dh, bit description Subaddress Bit Symbol 5Bh GAINU[8:0] 5Dh BLCKL[5:0] [1] Variable gain for C ...
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Philips Semiconductors Table 54: Bit 7 and 6 CCRS[1: Table 55: Legend default value after reset. Bit SAA7102_SAA7103_4 Product data sheet CCR and blanking level VBI register, ...
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Philips Semiconductors Table 56: Legend default value after reset recommended value. Bit Symbol BSTA[6:0] R/W Table 57: Subaddress Bit 66h 65h 64h 63h FSC [1] Examples: a) NTSC ...
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Philips Semiconductors [1] Values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed; increasing HTRIG decreases delays of all internally generated timing signals. [2] Increasing VTRIG decreases delays of all internally generated timing signals, measured in ...
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Philips Semiconductors Table 61: Bit Table 62: Subaddress Bit 70h 71h 72h [1] Values above 1715 (FISE = 1) or 1727 (FISE = 0) are not allowed. Table 63: Legend default value after reset. ...
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Philips Semiconductors Table 65: Bit Symbol CSYNCA[4:0] R Table 66: Legend default value after reset. Bit Symbol TTXOVS[7:0] R/W Table 67: Legend default value after reset. ...
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Philips Semiconductors Table 70: Bit Symbol FAL[7:0] Table 71: Bit Symbol LAL[7:0] Table 72: Legend default value after reset. Bit Symbol 7 TTX60 6 LAL8 FAL8 3 TTXEVE8 2 ...
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Philips Semiconductors Table 75: Bit Table 76: Bit Table 77: Bit Table 78: Bit Table 79: Bit 7 and 6 5 and 4 3 and 2 1 and ...
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Philips Semiconductors Table 81: Bit and 0 YPIX[9:8] Table 82: Bit SAA7102_SAA7103_4 Product data sheet Scaler CTRL, MCB and YPIX register, subaddress 96h, bit description Symbol Access Value Description ...
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Philips Semiconductors Table 82: Bit Table 83: Bit Table 84: Bit Table 85: Bit SAA7102_SAA7103_4 Product data sheet Sync control register, subaddress 97h, ...
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Philips Semiconductors Table 86: Bit Table 87: Bit Table 88: Bit Table 89: Bit Table 90: Bit Table 91: ...
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Philips Semiconductors Table 93: Bit Table 94: Bit Table 95: Bit Table 96: Subaddress Bit F0h F1h F2h Table 97: Subaddress Bit F3h F4h F5h Table 98: Subaddress Bit F6h F7h ...
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Philips Semiconductors Table 100: Vertical cursor position and vertical hot spot, MSB YCP registers, subaddresses Subaddress Bit FCh FBh Table 101: Input path control register, subaddress FDh, bit description Bit Symbol 7 LUTOFF R/W 6 CMODE R/W 5 LUTL 4 ...
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Philips Semiconductors Table 103: Color look-up table register, subaddress FFh, bit description Data byte COLSA In subaddresses 5Bh, 5Ch, 5Dh, 5Eh and 62h all IRE values are rounded up. 8.4 Slave transmitter Table 104: Status byte register, subaddress 00h, bit ...
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Philips Semiconductors Table 107: FIFO status register, subaddress 80h, bit description Bit Symbol Access Value Description OVFL 0 UDFL G v (dB) (1) SCBW = 1. (2) SCBW = 0. Fig 6. Chrominance transfer characteristic ...
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Philips Semiconductors (1) SCBW = 1. (2) SCBW = 0. Fig 7. Chrominance transfer characteristic (dB) (1) CCRS[1:0] = 01. (2) CCRS[1:0] = 10. (3) CCRS[1:0] = 11. (4) CCRS[1:0] = 00. Fig 8. Luminance transfer characteristic ...
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Philips Semiconductors (1) CCRS[1: Fig 9. Luminance transfer characteristic 2 (excluding scaler) G (dB) Fig 10. Luminance transfer characteristic in RGB (excluding scaler) SAA7102_SAA7103_4 Product data sheet (dB) 0 −1 −2 −3 −4 −5 0 ...
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Philips Semiconductors G (dB) Fig 11. Color difference transfer characteristic in RGB (excluding scaler) SAA7102_SAA7103_4 Product data sheet −6 −12 −18 −24 −30 −36 −42 −48 − Rev. 04 — 18 January 2006 SAA7102; ...
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Philips Semiconductors 9. Limiting values Table 108: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All ground pins connected together and grounded (0 V); all supply pins connected together. Symbol Parameter V DDD V DDA V ...
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Philips Semiconductors 11. Characteristics Table 110: Characteristics = 0 ° °C (typical values excluded); unless otherwise specifi DDD amb Symbol Parameter Supplies V analog supply voltage DDA V digital supply ...
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Philips Semiconductors Table 110: Characteristics …continued = 0 ° °C (typical values excluded); unless otherwise specifi DDD amb Symbol Parameter Crystal specification T ambient temperature amb C load capacitance L ...
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Philips Semiconductors PIXCLKO PIXCLKI any output Fig 12. Input/output timing specification HSVGC Fig 13. Horizontal input timing HSVGC VSVGC Fig 14. Vertical input timing SAA7102_SAA7103_4 Product data sheet t HIGH t d(CLKD) t HD;DAT PDn t o(d) t o(h) CBO ...
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Philips Semiconductors 11.1 Teletext timing Time t FD VBS output signal, such that it appears at t after the leading edge of the horizontal synchronization pulse. Time t PD TTXRQ_XCLKO2 in order to deliver TTX data. This delay is programmable ...
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V DDA3_2 V DDA3_1 V DD3_2 V DD3_1 PD [ 0:11 ] PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 TP4 TP5 CBO PD0 HSVGC HSVGC VSVGC FSVGC CBO TTX_SRES TTXRQ_XCLKO2 TP3 XCLKO2 V DDA3_1 V DD3_1 ...
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Philips Semiconductors Fig 17. FLTR0, FLTR1 and FLTR2 of 12.1 Analog output voltages The analog output voltages are dependent on the total load (typical value 37.5 Ω), the digital gain parameters and the I settings). The digital output signals in ...
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Philips Semiconductors Place the analog coupling (clamp) capacitors close to the analog input pins. Place the analog termination resistors close to the coupling capacitors. Be careful of hidden layout capacitors around the crystal application. Use serial resistors in clock, sync ...
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Philips Semiconductors 13.1.2 Device identification codes A device identification register is specified in “IEEE Std. 1149.1b-1994” 32-bit register which contains fields for the specification of the IC manufacturer, the IC part number and the IC version number. ...
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Philips Semiconductors 14. Package outline LBGA156: plastic low profile ball grid array package; 156 balls; body 1.05 mm ball A1 index area ...
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Philips Semiconductors QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1. pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT A ...
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Philips Semiconductors 15. Soldering 15.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors – smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. • For packages with leads on four sides, ...
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Philips Semiconductors [4] These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, ...
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Philips Semiconductors 17. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors 22. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...