SAA7183WP PHILIPS [NXP Semiconductors], SAA7183WP Datasheet - Page 19

no-image

SAA7183WP

Manufacturer Part Number
SAA7183WP
Description
Digital Video Encoder EURO-DENC
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAA7183WP
Quantity:
12 388
Part Number:
SAA7183WP
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
Table 19 Subaddress 67 to 6A
Note
1. LSBs of the respective bytes are encoded immediately after run-in and framing code, the MSBs of the respective
Table 20 Subaddress 6B
1996 Jul 08
L21O0
L21O1
L21E0
L21E1
PRCV2
ORCV2
CBLF
PRCV1
ORCV1
TRCV2
SRCV1
DATA BYTE
DATA BYTE
Digital Video Encoder (EURO-DENC)
bytes have to carry the parity bit, in accordance with the definition of Line 21 encoding format.
(1)
first byte of captioning data, odd field
second byte of captioning data, odd field
first byte of extended data, even field
second byte of extended data, even field
LOGIC LEVEL
0
1
0
1
0
1
0
1
0
1
0
1
polarity of RCV2 as output is active HIGH, rising edge is taken when input; default
after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input
pin RCV2 is switched to input; default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is defined by RCV2S and RCV2E, also during vertical blanking Interval); default
after reset
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1); default after reset
if ORCV2 = HIGH, pin RCV2 provides a ‘Composite-Blanking-Not’ signal, for
example a reference pulse that is defined by RCV2S and RCV2E, excluding Vertical
Blanking Interval, which is defined by FAL and LAL (PRCV2 must be LOW)
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) and as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively; default after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
pin RCV1 is switched to input; default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port; default after reset
horizontal synchronization is taken from RCV2 port
defines signal type on pin RCV1; see Table 21
19
DESCRIPTION
DESCRIPTION
SAA7182; SAA7183
Preliminary specification

Related parts for SAA7183WP