SAA7183WP PHILIPS [NXP Semiconductors], SAA7183WP Datasheet - Page 33

• Manufacturer Part Number: SAA7183WP
• Description: Digital Video Encoder EURO-DENC
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Teletext timing
Time t
and inserting it into the CVBS and Y output signal, such
that it appears at t
the horizontal synchronization pulse.
Time t
source that is gated by TTXRQ in order to deliver TTX
data.
Since the pulse representing the TTXRQ signal is fully
programmable in duration and rising/falling edges (TTXHS
and TTXHE), it always can be ensured that the TTX data
is inserted at the correct position of 10.2 s after the
leading edge of outgoing horizontal synchronization pulse.
Time t
TTX data; it has a constant length that allows insertion of
360 teletext bits (maximum) at a text data rate of
6.9375 bits/s. The insertion window is not opened if the
control bit TTXEN is zero.
T
The frequency relationship between TTX bit clock and the
system clock LLC for 50 Hz field rate is given by the
relationship of line frequency multiples, which means
1728/444.
1996 Jul 08
handbook, full pagewidth
ELETEXT PROTOCOL
Digital Video Encoder (EURO-DENC)
CVBS/Y
TTX
TTXRQ
FD
PD
TTXWin
is the time needed to interpolate input data TTX
is the pipeline delay time introduced by the
is the internally used insertion window for
TTX
textbit #:
= 10.2 s after the leading edge of
t PD
t TTX
1
2
t FD
3
4
5
Fig.17 Teletext timing diagram.
6
7
8
9 10 11
4
33
3
Thus 37 TTX bits correspond to 144 LLC clocks, each bit
has a duration of nearly 4 LLC clocks. The chip-internal
sequencer and variable phase interpolation filter
minimizes the phase jitter, and thus generates a
bandwidth limited signal, which is digital-to-analog
converted for the CVBS and Y outputs.
At the TTX input, bit duration scheme repeats after 37 TTX
bits or 144 LLC clocks. The protocol demands that TXX
bits 10, 19, 28 and 37 are carried by three LLC samples,
all others by four LLC samples. After a cycle of 37 TTX
bits, the next bits with three LLC samples are bits 47, 56,
65 and 74; this scheme holds for all succeeding cycles of
37 TTX bits, until 360 TTX bits (including 16 run-in bits)
are completed. For every additional line with TTX data, the
bit duration scheme starts in the same way.
Using appropriate programming, all suitable lines of the
odd field (TTXOVS and TTXOVE) plus all suitable lines of
the even field (TTXEVS and TTXEVE) can be used for
teletext insertion.
4
1/LLC
12 13 14
t TTXWin
15
16 17 18 19 20 21 22 23
SAA7182; SAA7183
4
3
Preliminary specification
4
1/LLC
MGB701
24