EP1C4 ALTERA [Altera Corporation], EP1C4 Datasheet - Page 32

• Manufacturer Part Number: EP1C4
• Description: Cyclone FPGA Family Data Sheet
• Manufacturer: ALTERA [Altera Corporation]

Cyclone Device Handbook, Volume 1
Figure 2–18. Input/Output Clock Mode in True Dual-Port Mode
Notes to
(1)
(2)
2–26
Preliminary
clken
wren
clock
A
A
A
data
byteena
address
All registers shown have asynchronous clear ports.
Violating the setup or hold time on the address registers could corrupt the memory contents. This applies to both
read and write operations.
A
[ ]
6
A
A
[ ]
Figure
[ ]
6 LAB Row Clocks
2–18:
D
ENA
D
ENA
D
ENA
D
ENA
Q
Q
Q
Q
Generator
Pulse
Write
D
ENA
Data In
Byte Enable A
Address A
Write/Read
Enable
Data Out
Q
A
Memory Block
256 × 16 (2)
q
1,024 × 4
2,048 × 2
4,096 × 1
A
512 × 8
[ ]
q
B
[ ]
Byte Enable B
Write/Read
Address B
Data Out
B
Data In
Enable
Q
ENA
D
Note
Generator
Write
Pulse
(1),
(2)
Q
Q
Q
Q
ENA
ENA
ENA
ENA
D
D
D
D
Altera Corporation
January 2007
6
data
byteena
address
wren
clken
clock
B
B
B
B
[ ]
B
B
[ ]
[ ]