EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 136

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
If the error condition interrupt is enabled, any of these four error conditions result
in an interrupt request being sent to the eZ80F91device’s interrupt controller.
Reading the Flash Interrupt Control register clears all error condition flags and the
DONE flag. See Table 41.
Table 41. Flash Interrupt Control Register
(FLASH_IRQ = 00FBh)
Bit
Reset
CPU Access
Note: R/W = Read/Write, R = Read Only. Read resets bits [5] and [3:0].
Bit
Position
[7]
DONE_IEN
[6]
ERR_IEN
[5]
DONE
[4]
[3]
WR_VIO
[2]
RP_TMO
[1]
PG_VIO
[0]
MASS_VIO
Note: The lower 32 KB block (00000h to 07FFFh) is called the Boot Block and can be protected
using the external WP pin. Attempts to page erase BLK0 or mass erase Flash when WP is
asserted result in failure and signal an erase violation.
Value Description
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
R/W
Flash Erase/Row Program Done Interrupt is disabled.
Flash Erase/Row Program Done Interrupt is enabled.
Error Condition Interrupt is disabled.
Error Condition Interrupt is enabled.
Erase/Row Program Done Flag is not set.
Erase/Row Program Done Flag is set.
Reserved.
The Write Violation Error Flag is not set.
The Write Violation Error Flag is set.
The Row Program Time-Out Error Flag is not set.
The Row Program Time-Out Error Flag is set.
The Page Erase Violation Error Flag is not set.
The Page Erase Violation Error Flag is set.
The Mass Erase Violation Error Flag is not set.
The Mass Erase Violation Error Flag is set.
P R E L I M I N A R Y
7
0
R/W
6
0
R
5
0
R
4
0
R
3
0
Product Specification
R
2
0
eZ80F91 MCU
R
1
0
Flash Memory
R
0
0
117

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