PIC12F635-E/MD MICROCHIP [Microchip Technology], PIC12F635-E/MD Datasheet - Page 146

• Manufacturer Part Number: PIC12F635-E/MD
• Description: 8/14-Pin, Flash-Based 8-Bit CMOS Microcontrollers with nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F635/PIC16F636/639
REGISTER 12-2:
TABLE 12-8:
DS41232D-page 144
WDTCON
OPTION_REG
CONFIG
Legend:
Note
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-1
bit 0
Note 1:
Name
U-0
—
1:
Shaded cells are not used by the Watchdog Timer.
See Register 12-1 for operation of all Configuration Word register bits.
If WDTE Configuration bit = 1, then WDT is always enabled, irrespective of this control bit. If WDTE
Configuration bit = 0, then it is possible to turn WDT on/off with this control bit.
Unimplemented: Read as ‘0’
WDTPS<3:0>: Watchdog Timer Period Select bits
Bit Value = Prescale Rate
0000 = 1:32
0001 = 1:64
0010 = 1:128
0011 = 1:256
0100 = 1:512 (Reset value)
0101 = 1:1024
0110 = 1:2048
0111 = 1:4096
1000 = 1:8192
1001 = 1:16384
1010 = 1:32768
1011 = 1:65536
1100 = Reserved
1101 = Reserved
1110 = Reserved
1111 = Reserved
SWDTEN: Software Enable or Disable the Watchdog Timer bit
1 = WDT is turned on
0 = WDT is turned off (Reset value)
RAPU
Bit 7
CPD
SUMMARY OF REGISTERS ASSOCIATED WITH WATCHDOG TIMER
—
U-0
—
WDTCON: WATCHDOG TIMER CONTROL REGISTER
INTEDG
Bit 6
CP
—
W = Writable bit
‘1’ = Bit is set
MCLRE
T0CS
Bit 5
U-0
—
—
WDTPS3
PWRTE
T0SE
Bit 4
WDTPS3
R/W-0
WDTPS2
WDTE
Bit 3
PSA
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTPS2
WSTPS1
R/W-1
FOSC2
Bit 2
PS2
WDTPS0
FOSC1
Bit 1
PS1
WDTPS1
R/W-0
(1)
SWDTEN
FOSC0
Bit 0
PS0
© 2007 Microchip Technology Inc.
x = Bit is unknown
WDTPS0
---0 1000
1111 1111
POR, BOR
R/W-0
Value on
—
SWDTEN
---0 1000
1111 1111
Value on
all other
R/W-0
Resets
—
bit 0
(1)