USB3450-FZG SMSC [SMSC Corporation], USB3450-FZG Datasheet - Page 29

• Manufacturer Part Number: USB3450-FZG
• Description: HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE
• Manufacturer: SMSC [SMSC Corporation]

Hi-Speed USB Host or Device PHY With UTMI+ Interface
Datasheet
SMSC USB3450
7.6
PARAMETER
HS Reset T0
TIMING
T1
T2
If a HS device detects SE0 asserted on the bus for more than 3ms (T1), it reverts to FS mode. This
enables the FS pull-up on the DP line in an attempt to assert a continuous FS J state on the bus. The
Link must then check LINESTATE for the J condition. If J is asserted at time T2, then the upstream
port is asserting a soft SE0 and the USB is in a J state indicating a suspend condition. By time T4 the
device must be fully suspended.
Suspend Detection
Bus activity ceases, signaling either a reset
or a SUSPEND.
Earliest time at which the device may place
itself in FS mode after bus activity stops.
Link samples LINESTATE. If LINESTATE =
SE0, then the SE0 on the bus is due to a
Reset state. The device now enters the HS
Detection Handshake protocol.
Figure 7.1 Reset Timing Behavior (HS Mode)
Table 7.4 Reset Timing Values (HS Mode)
DESCRIPTION
DATASHEET
29
0 (reference)
HS Reset T0 + 3. 0ms < T1 < HS Reset T0
+ 3.125ms
T1 + 100µs < T2 <
T1 + 875µs
VALUE
Revision 0.1 (05-11-05)